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8cb6e17571
Looking at the ARM disassembler output, every comment seems to start
with a ';' character, so I assumed this was the correct character to
start an assembler comment.
I then spotted a couple of places where there was no ';', but instead,
just a '@' character. I thought that this was a case of a missing
';', and proposed a patch to add the missing ';' characters.
Turns out I was wrong, '@' is actually the ARM assembler comment
character, while ';' is the statement separator. Thus this:
nop ;@ comment
is two statements, the first is the 'nop' instruction, while the
second contains no instructions, just the '@ comment' comment text.
This:
nop @ comment
is a single 'nop' instruction followed by a comment. And finally,
this:
nop ; comment
is two statements, the first contains the 'nop' instruction, while the
second contains the instruction 'comment', which obviously isn't
actually an instruction at all.
Why this matters is that, in the next commit, I would like to add
libopcodes syntax styling support for ARM.
The question then is how should the disassembler style the three cases
above?
As '@' is the actual comment start character then clearly the '@' and
anything after it can be styled as a comment. But what about ';' in
the second example? Style as text? Style as a comment?
And the third example is even harder, what about the 'comment' text?
Style as an instruction mnemonic? Style as text? Style as a comment?
I think the only sensible answer is to move the disassembler to use
'@' consistently as its comment character, and remove all the uses of
';'.
Then, in the next commit, it's obvious what to do.
There's obviously a *lot* of tests that get updated by this commit,
the only actual code changes are in opcodes/arm-dis.c.
175 lines
5.7 KiB
Makefile
175 lines
5.7 KiB
Makefile
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.*: file format elf32-littlearm.*
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Disassembly of section \.text:
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00008000 <__stm32l4xx_veneer_0>:
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8000: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6}
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8004: e899 0380 ldmia\.w r9, {r7, r8, r9}
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8008: f000 b88c b\.w 8124 <__stm32l4xx_veneer_0_r>
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800c: f7f0 a000 udf\.w #0
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00008010 <__stm32l4xx_veneer_1>:
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8010: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6}
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8014: e899 8380 ldmia\.w r9, {r7, r8, r9, pc}
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8018: f7f0 a000 udf\.w #0
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801c: f7f0 a000 udf\.w #0
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00008020 <__stm32l4xx_veneer_2>:
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8020: 4607 mov r7, r0
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8022: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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8026: e897 0380 ldmia\.w r7, {r7, r8, r9}
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802a: f000 b87f b\.w 812c <__stm32l4xx_veneer_2_r>
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802e: de00 udf #0
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00008030 <__stm32l4xx_veneer_3>:
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8030: 460f mov r7, r1
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8032: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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8036: e897 0380 ldmia\.w r7, {r7, r8, r9}
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803a: f000 b879 b\.w 8130 <__stm32l4xx_veneer_3_r>
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803e: de00 udf #0
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00008040 <__stm32l4xx_veneer_4>:
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8040: 4607 mov r7, r0
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8042: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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8046: e897 8380 ldmia\.w r7, {r7, r8, r9, pc}
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804a: de00 udf #0
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804c: f7f0 a000 udf\.w #0
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00008050 <__stm32l4xx_veneer_5>:
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8050: 460f mov r7, r1
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8052: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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8056: e897 8380 ldmia\.w r7, {r7, r8, r9, pc}
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805a: de00 udf #0
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805c: f7f0 a000 udf\.w #0
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00008060 <__stm32l4xx_veneer_6>:
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8060: e8b0 007e ldmia\.w r0!, {r1, r2, r3, r4, r5, r6}
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8064: e8b0 0380 ldmia\.w r0!, {r7, r8, r9}
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8068: f000 b868 b\.w 813c <__stm32l4xx_veneer_6_r>
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806c: f7f0 a000 udf\.w #0
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00008070 <__stm32l4xx_veneer_7>:
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8070: e8b0 007e ldmia\.w r0!, {r1, r2, r3, r4, r5, r6}
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8074: e8b0 8380 ldmia\.w r0!, {r7, r8, r9, pc}
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8078: f7f0 a000 udf\.w #0
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807c: f7f0 a000 udf\.w #0
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00008080 <__stm32l4xx_veneer_8>:
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8080: e931 0380 ldmdb r1!, {r7, r8, r9}
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8084: e911 007e ldmdb r1, {r1, r2, r3, r4, r5, r6}
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8088: f000 b85c b\.w 8144 <__stm32l4xx_veneer_8_r>
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808c: f7f0 a000 udf\.w #0
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00008090 <__stm32l4xx_veneer_9>:
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8090: 4651 mov r1, sl
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8092: e931 0380 ldmdb r1!, {r7, r8, r9}
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8096: e911 007e ldmdb r1, {r1, r2, r3, r4, r5, r6}
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809a: f000 b855 b\.w 8148 <__stm32l4xx_veneer_9_r>
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809e: de00 udf #0
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000080a0 <__stm32l4xx_veneer_a>:
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80a0: 4649 mov r1, r9
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80a2: e931 0380 ldmdb r1!, {r7, r8, r9}
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80a6: e911 007e ldmdb r1, {r1, r2, r3, r4, r5, r6}
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80aa: f000 b84f b\.w 814c <__stm32l4xx_veneer_a_r>
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80ae: de00 udf #0
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000080b0 <__stm32l4xx_veneer_b>:
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80b0: f1a9 0928 sub\.w r9, r9, #40 @ 0x28
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80b4: e8b9 007e ldmia\.w r9!, {r1, r2, r3, r4, r5, r6}
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80b8: e899 8380 ldmia\.w r9, {r7, r8, r9, pc}
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80bc: f7f0 a000 udf\.w #0
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000080c0 <__stm32l4xx_veneer_c>:
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80c0: f1a1 0728 sub\.w r7, r1, #40 @ 0x28
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80c4: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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80c8: e897 8380 ldmia\.w r7, {r7, r8, r9, pc}
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80cc: f7f0 a000 udf\.w #0
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000080d0 <__stm32l4xx_veneer_d>:
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80d0: f1a0 0728 sub\.w r7, r0, #40 @ 0x28
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80d4: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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80d8: e897 8380 ldmia\.w r7, {r7, r8, r9, pc}
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80dc: f7f0 a000 udf\.w #0
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000080e0 <__stm32l4xx_veneer_e>:
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80e0: e930 0380 ldmdb r0!, {r7, r8, r9}
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80e4: e930 007e ldmdb r0!, {r1, r2, r3, r4, r5, r6}
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80e8: f000 b838 b\.w 815c <__stm32l4xx_veneer_e_r>
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80ec: f7f0 a000 udf\.w #0
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000080f0 <__stm32l4xx_veneer_f>:
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80f0: f1a0 0028 sub\.w r0, r0, #40 @ 0x28
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80f4: 4607 mov r7, r0
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80f6: e8b7 007e ldmia\.w r7!, {r1, r2, r3, r4, r5, r6}
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80fa: e897 8380 ldmia\.w r7, {r7, r8, r9, pc}
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80fe: de00 udf #0
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00008100 <__stm32l4xx_veneer_10>:
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8100: e8bd 007f ldmia\.w sp!, {r0, r1, r2, r3, r4, r5, r6}
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8104: e8bd 0380 ldmia\.w sp!, {r7, r8, r9}
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8108: f000 b82c b\.w 8164 <__stm32l4xx_veneer_10_r>
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810c: f7f0 a000 udf\.w #0
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00008110 <__stm32l4xx_veneer_11>:
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8110: e8bd 007f ldmia\.w sp!, {r0, r1, r2, r3, r4, r5, r6}
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8114: e8bd 8380 ldmia\.w sp!, {r7, r8, r9, pc}
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8118: f7f0 a000 udf\.w #0
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811c: f7f0 a000 udf\.w #0
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00008120 <_start>:
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8120: f7ff bf6e b\.w 8000 <__stm32l4xx_veneer_0>
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00008124 <__stm32l4xx_veneer_0_r>:
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8124: f7ff bf74 b\.w 8010 <__stm32l4xx_veneer_1>
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00008128 <__stm32l4xx_veneer_1_r>:
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8128: f7ff bf7a b\.w 8020 <__stm32l4xx_veneer_2>
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0000812c <__stm32l4xx_veneer_2_r>:
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812c: f7ff bf80 b\.w 8030 <__stm32l4xx_veneer_3>
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00008130 <__stm32l4xx_veneer_3_r>:
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8130: f7ff bf86 b\.w 8040 <__stm32l4xx_veneer_4>
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00008134 <__stm32l4xx_veneer_4_r>:
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8134: f7ff bf8c b\.w 8050 <__stm32l4xx_veneer_5>
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00008138 <__stm32l4xx_veneer_5_r>:
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8138: f7ff bf92 b\.w 8060 <__stm32l4xx_veneer_6>
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0000813c <__stm32l4xx_veneer_6_r>:
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813c: f7ff bf98 b\.w 8070 <__stm32l4xx_veneer_7>
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00008140 <__stm32l4xx_veneer_7_r>:
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8140: f7ff bf9e b\.w 8080 <__stm32l4xx_veneer_8>
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00008144 <__stm32l4xx_veneer_8_r>:
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8144: f7ff bfa4 b\.w 8090 <__stm32l4xx_veneer_9>
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00008148 <__stm32l4xx_veneer_9_r>:
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8148: f7ff bfaa b\.w 80a0 <__stm32l4xx_veneer_a>
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0000814c <__stm32l4xx_veneer_a_r>:
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814c: f7ff bfb0 b\.w 80b0 <__stm32l4xx_veneer_b>
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00008150 <__stm32l4xx_veneer_b_r>:
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8150: f7ff bfb6 b\.w 80c0 <__stm32l4xx_veneer_c>
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00008154 <__stm32l4xx_veneer_c_r>:
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8154: f7ff bfbc b\.w 80d0 <__stm32l4xx_veneer_d>
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00008158 <__stm32l4xx_veneer_d_r>:
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8158: f7ff bfc2 b\.w 80e0 <__stm32l4xx_veneer_e>
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0000815c <__stm32l4xx_veneer_e_r>:
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815c: f7ff bfc8 b\.w 80f0 <__stm32l4xx_veneer_f>
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00008160 <__stm32l4xx_veneer_f_r>:
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8160: f7ff bfce b\.w 8100 <__stm32l4xx_veneer_10>
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00008164 <__stm32l4xx_veneer_10_r>:
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8164: f7ff bfd4 b\.w 8110 <__stm32l4xx_veneer_11>
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