mirror of
https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
168 lines
6.0 KiB
C
168 lines
6.0 KiB
C
/* Copyright 2016-2024 Free Software Foundation, Inc.
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Contributed by Dimitar Dimitrov <dimitar@dinux.eu>
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This file is part of the PRU simulator.
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This library is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, see <http://www.gnu.org/licenses/>. */
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#ifndef PRU_H
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#define PRU_H
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#include <stdint.h>
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#include "opcode/pru.h"
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/* Needed for handling the dual PRU address space. */
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#define IMEM_ADDR_MASK ((1u << 23) - 1)
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#define IMEM_ADDR_DEFAULT 0x20000000
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/* Define memory sizes to allocate for simulated target. Sizes are
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artificially large to accommodate execution of compiler test suite.
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Please synchronize with the linker script for prusim target. */
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#define DMEM_DEFAULT_SIZE (64 * 1024 * 1024)
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/* 16-bit word addressable space. */
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#define IMEM_DEFAULT_SIZE (64 * 4 * 1024)
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/* For AM335x SoCs. */
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#define XFRID_SCRATCH_BANK_0 10
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#define XFRID_SCRATCH_BANK_1 11
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#define XFRID_SCRATCH_BANK_2 12
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#define XFRID_SCRATCH_BANK_PEER 14
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#define XFRID_MAX 255
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#define CPU (*pru_cpu)
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#define PC (CPU.pc)
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#define PC_byteaddr ((PC << 2) | PC_ADDR_SPACE_MARKER)
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/* Various opcode fields. */
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#define RS1 extract_regval (CPU.regs[GET_INSN_FIELD (RS1, inst)], \
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GET_INSN_FIELD (RS1SEL, inst))
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#define RS2 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
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GET_INSN_FIELD (RS2SEL, inst))
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#define RS2_w0 extract_regval (CPU.regs[GET_INSN_FIELD (RS2, inst)], \
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RSEL_15_0)
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#define XBBO_BASEREG (CPU.regs[GET_INSN_FIELD (RS1, inst)])
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#define RS1SEL GET_INSN_FIELD (RS1SEL, inst)
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#define RS1_WIDTH regsel_width (RS1SEL)
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#define RDSEL GET_INSN_FIELD (RDSEL, inst)
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#define RD_WIDTH regsel_width (RDSEL)
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#define RD_REGN GET_INSN_FIELD (RD, inst)
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#define IO GET_INSN_FIELD (IO, inst)
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#define IMM8 GET_INSN_FIELD (IMM8, inst)
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#define IMM16 GET_INSN_FIELD (IMM16, inst)
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#define WAKEONSTATUS GET_INSN_FIELD (WAKEONSTATUS, inst)
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#define CB GET_INSN_FIELD (CB, inst)
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#define RDB GET_INSN_FIELD (RDB, inst)
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#define XFR_WBA GET_INSN_FIELD (XFR_WBA, inst)
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#define LOOP_JMPOFFS GET_INSN_FIELD (LOOP_JMPOFFS, inst)
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#define BROFF ((uint32_t) GET_BROFF_SIGNED (inst))
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#define _BURSTLEN_CALCULATE(BITFIELD) \
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((BITFIELD) >= LSSBBO_BYTECOUNT_R0_BITS7_0 ? \
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(CPU.regs[0] >> ((BITFIELD) - LSSBBO_BYTECOUNT_R0_BITS7_0) * 8) & 0xff \
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: (BITFIELD) + 1)
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#define BURSTLEN _BURSTLEN_CALCULATE (GET_BURSTLEN (inst))
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#define XFR_LENGTH _BURSTLEN_CALCULATE (GET_INSN_FIELD (XFR_LENGTH, inst))
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#define DO_XIN(wba,regn,rdb,l) \
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pru_sim_xin (sd, cpu, (wba), (regn), (rdb), (l))
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#define DO_XOUT(wba,regn,rdb,l) \
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pru_sim_xout (sd, cpu, (wba), (regn), (rdb), (l))
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#define DO_XCHG(wba,regn,rdb,l) \
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pru_sim_xchg (sd, cpu, (wba), (regn), (rdb), (l))
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#define RAISE_SIGILL(sd) sim_engine_halt ((sd), NULL, NULL, PC_byteaddr, \
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sim_stopped, SIM_SIGILL)
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#define RAISE_SIGINT(sd) sim_engine_halt ((sd), NULL, NULL, PC_byteaddr, \
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sim_stopped, SIM_SIGINT)
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#define MAC_R25_MAC_MODE_MASK (1u << 0)
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#define MAC_R25_ACC_CARRY_MASK (1u << 1)
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#define CARRY CPU.carry
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#define CTABLE CPU.ctable
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#define PC_ADDR_SPACE_MARKER CPU.pc_addr_space_marker
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#define LOOPTOP CPU.loop.looptop
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#define LOOPEND CPU.loop.loopend
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#define LOOP_IN_PROGRESS CPU.loop.loop_in_progress
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#define LOOPCNT CPU.loop.loop_counter
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/* 32 GP registers plus PC. */
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#define NUM_REGS 33
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/* The machine state.
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This state is maintained in host byte order. The
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fetch/store register functions must translate between host
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byte order and the target processor byte order.
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Keeping this data in target byte order simplifies the register
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read/write functions. Keeping this data in host order improves
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the performance of the simulator. Simulation speed is deemed more
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important. */
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/* For clarity, please keep the same relative order in this enum as in the
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corresponding group of GP registers.
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In PRU ISA, Multiplier-Accumulator-Unit's registers are like "shadows" of
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the GP registers. MAC registers are implicitly addressed when executing
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the XIN/XOUT instructions to access them. Transfer to/from a MAC register
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can happen only from/to its corresponding GP peer register. */
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enum pru_macreg_id {
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/* MAC register CPU GP register Description. */
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PRU_MACREG_MODE, /* r25 */ /* Mode (MUL/MAC). */
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PRU_MACREG_PROD_L, /* r26 */ /* Lower 32 bits of product. */
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PRU_MACREG_PROD_H, /* r27 */ /* Higher 32 bits of product. */
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PRU_MACREG_OP_0, /* r28 */ /* First operand. */
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PRU_MACREG_OP_1, /* r29 */ /* Second operand. */
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PRU_MACREG_ACC_L, /* N/A */ /* Accumulator (not exposed) */
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PRU_MACREG_ACC_H, /* N/A */ /* Higher 32 bits of MAC
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accumulator. */
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PRU_MAC_NREGS
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};
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struct pru_regset
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{
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uint32_t regs[32]; /* Primary registers. */
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uint16_t pc; /* IMEM _word_ address. */
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uint32_t pc_addr_space_marker; /* IMEM virtual linker offset. This
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is the artificial offset that
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we invent in order to "separate"
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the DMEM and IMEM memory spaces. */
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unsigned int carry : 1;
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uint32_t ctable[32]; /* Constant offsets table for xBCO. */
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uint32_t macregs[PRU_MAC_NREGS];
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uint32_t scratchpads[XFRID_MAX + 1][32];
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struct {
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uint16_t looptop; /* LOOP top (PC of loop instr). */
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uint16_t loopend; /* LOOP end (PC of loop end label). */
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int loop_in_progress; /* Whether to check for PC==loopend. */
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uint32_t loop_counter; /* LOOP counter. */
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} loop;
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int cycles;
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int insts;
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};
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#define PRU_SIM_CPU(cpu) ((struct pru_regset *) CPU_ARCH_DATA (cpu))
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#endif /* PRU_H */
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