mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-15 04:31:49 +08:00
40fc1451c6
The MIPS assembly idiom 'move' now maps to the 'or' machine instruction. This change affects microMIPS, MIPS32, MIPS64. 2015-08-12 Simon Dardis <simon.dardis@imgtec.com> opcodes/ * micromips-opc.c (micromips_opcodes): Re-order table so that move based on 'or' is first. * mips-opc.c (mips_builtin_opcodes): Ditto. bfd/ * elfxx-mips.c (STUB_MOVE): Change to use 'or' only. (mips_o32_exec_plt0_entry, mips_n32_exec_plt0_entry, mips_n64_exec_plt0_entry, micromips_insn32_o32_exec_plt0_entry): Update to use 'or' instead of 'addu/daddu'. (_bfd_mips_elf_finish_dynamic_symbol): Update usage of STUB_MOVE. (move_insns_32): Reorder table. gas/ * config/tc-mips.c (move_register): Change to use 'or' only. (s_cpload, s_cpsetup, s_cprestore, s_cpreturn): Update to use or for move. gas/testsuite/ * gas/mips/elf-rel23.d: Update test. * gas/mips/elf-rel23.d: Ditto. * gas/mips/elf-rel23a.d: Ditto. * gas/mips/elf-rel23b.d: Ditto. * gas/mips/elf_e_flags1.d: Ditto. * gas/mips/elf_e_flags2.d: Ditto. * gas/mips/elf_e_flags3.d: Ditto. * gas/mips/elf_e_flags4.d: Ditto. * gas/mips/loc-swap-dis.d: Ditto. * gas/mips/micromips-insn32.d: Ditto. * gas/mips/micromips-noinsn32.d: Ditto. * gas/mips/micromips-trap.d: Ditto. * gas/mips/micromips.d: Ditto. * gas/mips/mips-abi32-pic.d: Ditto. * gas/mips/mips-abi32.d: Ditto. * gas/mips/mips-gp32-fp32-pic.d: Ditto. * gas/mips/mips-gp32-fp32.d: Ditto. * gas/mips/mips-gp32-fp64-pic.d: Ditto. * gas/mips/mips-gp32-fp64.d: Ditto. * gas/mips/mips-gp64-fp32-pic.d: Ditto. * gas/mips/mips-gp64-fp32.d: Ditto. * gas/mips/mips-gp64-fp64-pic.d: Ditto. * gas/mips/mips-gp64-fp64.d: Ditto. * gas/mips/mipsr6@loc-swap-dis.d: Ditto. * gas/mips/tls-o32.d: Ditto. * gas/mips/uld2-eb.d: Ditto. * gas/mips/uld2-el.d: Ditto. * gas/mips/ulw2-eb-ilocks.d: Ditto. * gas/mips/ulw2-eb.d: Ditto. * gas/mips/ulw2-el-ilocks.d: Ditto. * gas/mips/ulw2-el.d: Ditto. * gas/mips/move.d: New test. * gas/mips/move.s: Ditto. * gas/mips/micromips32-move.d: Ditto. * gas/mips/micromips32-move.s: Ditto. * gas/mips/mips.exp: Run the new tests. gold/ * mips.cc (plt0_entry_o32, plt0_entry_n32, plt0_entry_n64, lazy_stub_normal_1, lazy_stub_normal_1_n64, lazy_stub_normal_2, lazy_stub_normal_2_n64, lazy_stub_big, lazy_stub_big_n64, lazy_stub_micromips32_normal_1_n64, lazy_stub_micromips32_normal_2_n64, lazy_stub_micromips32_big, lazy_stub_micromips32_big_n64): Update to use 'or' for move instead of 'addu/daddu'. ld/testsuite/ * ld-mips-elf/compressed-plt-1-n32-mips16.od: Update test. * ld-mips-elf/compressed-plt-1-n32-umips.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-only.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-mips16.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-se.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-got.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips-word.od: Ditto. * ld-mips-elf/compressed-plt-1-o32-umips.od: Ditto. * ld-mips-elf/jalx-2.dd: Ditto. * ld-mips-elf/mips16-pic-3.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3a.dd: Ditto. * ld-mips-elf/pic-and-nonpic-3b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-5b.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-n32.dd: Ditto. * ld-mips-elf/pic-and-nonpic-6-o32.dd: Ditto. * ld-mips-elf/stub-dynsym-1-10000.d: Ditto. * ld-mips-elf/stub-dynsym-1-2fe80.d: Ditto. * ld-mips-elf/stub-dynsym-1-7fff.d: Ditto. * ld-mips-elf/stub-dynsym-1-8000.d: Ditto. * ld-mips-elf/stub-dynsym-1-fff0.d: Ditto. * ld-mips-elf/tlsbin-o32.d: Ditto. * ld-mips-elf/tlsdyn-o32-1.d: Ditto. * ld-mips-elf/tlsdyn-o32-2.d: Ditto. * ld-mips-elf/tlsdyn-o32-3.d: Ditto. * ld-mips-elf/tlsdyn-o32.d: Ditto. * ld-mips-elf/tlslib-o32.d: Ditto.
412 lines
12 KiB
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412 lines
12 KiB
Plaintext
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.* file format .*
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Disassembly of section \.plt:
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# At present, all n32 PLT entries use the standard encoding.
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10100000 <_PROCEDURE_LINKAGE_TABLE_>:
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.*: 3c0e1020 lui \$14,0x1020
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.*: 8dd90000 lw \$25,0\(\$14\)
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.*: 25ce0000 addiu \$14,\$14,0
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.*: 030ec023 subu \$24,\$24,\$14
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.*: 03e07825 move \$15,\$31
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.*: 0018c082 srl \$24,\$24,0x2
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.*: 0320f809 jalr \$25
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.*: 2718fffe addiu \$24,\$24,-2
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10100020 <f_lo_iu@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90008 lw \$25,8\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80008 addiu \$24,\$15,8
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10100030 <f_lo_iu_du_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9000c lw \$25,12\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8000c addiu \$24,\$15,12
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10100040 <f_lo_du_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90010 lw \$25,16\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80010 addiu \$24,\$15,16
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10100050 <f_du_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90014 lw \$25,20\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80014 addiu \$24,\$15,20
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10100060 <f_lo_iu_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90018 lw \$25,24\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80018 addiu \$24,\$15,24
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10100070 <f_iu_du_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9001c lw \$25,28\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8001c addiu \$24,\$15,28
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10100080 <f_lo_du_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90020 lw \$25,32\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80020 addiu \$24,\$15,32
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10100090 <f_iu_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90024 lw \$25,36\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80024 addiu \$24,\$15,36
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101000a0 <f_lo_iu_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90028 lw \$25,40\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80028 addiu \$24,\$15,40
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101000b0 <f_lo_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9002c lw \$25,44\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8002c addiu \$24,\$15,44
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101000c0 <f_lo_du_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90030 lw \$25,48\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80030 addiu \$24,\$15,48
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101000d0 <f_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90034 lw \$25,52\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80034 addiu \$24,\$15,52
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101000e0 <f_du_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90038 lw \$25,56\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80038 addiu \$24,\$15,56
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101000f0 <f_du_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9003c lw \$25,60\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8003c addiu \$24,\$15,60
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10100100 <f_iu_du_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90040 lw \$25,64\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80040 addiu \$24,\$15,64
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10100110 <f_lo_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90044 lw \$25,68\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80044 addiu \$24,\$15,68
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10100120 <f_iu_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90048 lw \$25,72\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80048 addiu \$24,\$15,72
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10100130 <f_lo_iu_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9004c lw \$25,76\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8004c addiu \$24,\$15,76
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10100140 <f_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90050 lw \$25,80\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80050 addiu \$24,\$15,80
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10100150 <f_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90054 lw \$25,84\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80054 addiu \$24,\$15,84
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10100160 <f_lo_du@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90058 lw \$25,88\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80058 addiu \$24,\$15,88
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10100170 <f_iu_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9005c lw \$25,92\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8005c addiu \$24,\$15,92
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10100180 <f_iu_du_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90060 lw \$25,96\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80060 addiu \$24,\$15,96
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10100190 <f_lo_iu_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90064 lw \$25,100\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80064 addiu \$24,\$15,100
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101001a0 <f_lo_iu_du_ic@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90068 lw \$25,104\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80068 addiu \$24,\$15,104
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101001b0 <f_lo_iu_du_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df9006c lw \$25,108\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f8006c addiu \$24,\$15,108
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101001c0 <f_lo_ic_dc@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90070 lw \$25,112\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80070 addiu \$24,\$15,112
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101001d0 <f_lo@plt>:
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.*: 3c0f1020 lui \$15,0x1020
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.*: 8df90074 lw \$25,116\(\$15\)
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.*: 03200008 jr \$25
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.*: 25f80074 addiu \$24,\$15,116
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Disassembly of section \.MIPS\.stubs:
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10101000 <_MIPS_STUBS_>:
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# Lazy-binding stub for f_iu.
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.*: ff3c 8010 lw \$25,-32752\(\$28\)
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.*: 0dff move \$15,\$31
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.*: 45d9 jalr \$25
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.*: 3300 0021 li \$24,33
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# Lazy-binding stub for f_ic.
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.*: ff3c 8010 lw \$25,-32752\(\$28\)
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.*: 0dff move \$15,\$31
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.*: 45d9 jalr \$25
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.*: 3300 0020 li \$24,32
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# Lazy-binding stub for f_iu_ic.
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.*: ff3c 8010 lw \$25,-32752\(\$28\)
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.*: 0dff move \$15,\$31
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.*: 45d9 jalr \$25
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.*: 3300 001f li \$24,31
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\.\.\.
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Disassembly of section \.text\.a:
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10102000 <testc>:
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.*: .... .... jalx [0-9a-f]+ <f_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8070 lw \$2,-32656\(\$3\)
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# ^ global GOT entry for f_ic
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.*: .... .... jalx [0-9a-f]+ <f_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8018 lw \$2,-32744\(\$3\)
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# ^ local GOT entry for f_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_du_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 801c lw \$2,-32740\(\$3\)
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# ^ local GOT entry for f_du_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_du_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8020 lw \$2,-32736\(\$3\)
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# ^ local GOT entry for f_du_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_iu_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 806c lw \$2,-32660\(\$3\)
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# ^ global GOT entry for f_iu_ic
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.*: .... .... jalx [0-9a-f]+ <f_iu_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8024 lw \$2,-32732\(\$3\)
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# ^ local GOT entry for f_iu_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_iu_du_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8028 lw \$2,-32728\(\$3\)
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# ^ local GOT entry for f_iu_du_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_iu_du_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 802c lw \$2,-32724\(\$3\)
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# ^ local GOT entry for f_iu_du_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8030 lw \$2,-32720\(\$3\)
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# ^ local GOT entry for f_lo_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8034 lw \$2,-32716\(\$3\)
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# ^ local GOT entry for f_lo_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_du_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8038 lw \$2,-32712\(\$3\)
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# ^ local GOT entry for f_lo_du_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_du_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 803c lw \$2,-32708\(\$3\)
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# ^ local GOT entry for f_lo_du_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_iu_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8040 lw \$2,-32704\(\$3\)
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# ^ local GOT entry for f_lo_iu_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_iu_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8044 lw \$2,-32700\(\$3\)
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# ^ local GOT entry for f_lo_iu_ic_dc@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 8048 lw \$2,-32696\(\$3\)
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# ^ local GOT entry for f_lo_iu_du_ic@plt
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.*: .... .... jalx [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
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.*: 0000 0000 nop
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.*: fc43 804c lw \$2,-32692\(\$3\)
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# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
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.*: 459f jr \$31
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Disassembly of section \.text\.b:
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10103000 <testu>:
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.*: ........ jal [0-9a-f]+ <f_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_du@plt>
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.*: 00000000 nop
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.*: ........ jal [0-9a-f]+ <f_du_dc@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_du_dc@plt>
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.*: 00000000 nop
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.*: ........ jal [0-9a-f]+ <f_du_ic@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_du_ic@plt>
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.*: 00000000 nop
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.*: ........ jal [0-9a-f]+ <f_du_ic_dc@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_du_ic_dc@plt>
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.*: 00000000 nop
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.*: 8c628074 lw \$2,-32652\(\$3\)
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# ^ global GOT entry for f_iu
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.*: 8c628050 lw \$2,-32688\(\$3\)
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# ^ local GOT entry for f_iu_dc@plt
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.*: 8c62806c lw \$2,-32660\(\$3\)
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# ^ global GOT entry for f_iu_ic
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.*: 8c628024 lw \$2,-32732\(\$3\)
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# ^ local GOT entry for f_iu_ic_dc@plt
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.*: ........ jal [0-9a-f]+ <f_iu_du@plt>
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.*: 00000000 nop
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.*: ........ j [0-9a-f]+ <f_iu_du@plt>
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.*: 00000000 nop
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.*: 8c628054 lw \$2,-32684\(\$3\)
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# ^ local GOT entry for f_iu_du@plt
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.*: ........ jal [0-9a-f]+ <f_iu_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_iu_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c628058 lw \$2,-32680\(\$3\)
|
|
# ^ local GOT entry for f_iu_du_dc@plt
|
|
.*: ........ jal [0-9a-f]+ <f_iu_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_iu_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c628028 lw \$2,-32728\(\$3\)
|
|
# ^ local GOT entry for f_iu_du_ic@plt
|
|
.*: ........ jal [0-9a-f]+ <f_iu_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_iu_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c62802c lw \$2,-32724\(\$3\)
|
|
# ^ local GOT entry for f_iu_du_ic_dc@plt
|
|
.*: ........ jal [0-9a-f]+ <f_lo_du@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_du@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ jal [0-9a-f]+ <f_lo_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ jal [0-9a-f]+ <f_lo_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ jal [0-9a-f]+ <f_lo_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c62805c lw \$2,-32676\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu@plt
|
|
.*: 8c628060 lw \$2,-32672\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_dc@plt
|
|
.*: 8c628040 lw \$2,-32704\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_ic@plt
|
|
.*: 8c628044 lw \$2,-32700\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_ic_dc@plt
|
|
.*: ........ jal [0-9a-f]+ <f_lo_iu_du@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_iu_du@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c628064 lw \$2,-32668\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_du@plt
|
|
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_iu_du_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c628068 lw \$2,-32664\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_du_dc@plt
|
|
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c628048 lw \$2,-32696\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_du_ic@plt
|
|
.*: ........ jal [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: ........ j [0-9a-f]+ <f_lo_iu_du_ic_dc@plt>
|
|
.*: 00000000 nop
|
|
.*: 8c62804c lw \$2,-32692\(\$3\)
|
|
# ^ local GOT entry for f_lo_iu_du_ic_dc@plt
|
|
.*: 03e00008 jr \$31
|
|
|
|
Disassembly of section \.text\.c:
|
|
|
|
10104000 <testlo>:
|
|
.*: 3040 01d0 li \$2,464
|
|
# ^ low 16 bits of f_lo@plt
|
|
.*: 3040 0110 li \$2,272
|
|
# ^ low 16 bits of f_lo_dc@plt
|
|
.*: 3040 00b0 li \$2,176
|
|
# ^ low 16 bits of f_lo_ic@plt
|
|
.*: 3040 01c0 li \$2,448
|
|
# ^ low 16 bits of f_lo_ic_dc@plt
|
|
.*: 3040 0160 li \$2,352
|
|
# ^ low 16 bits of f_lo_du@plt
|
|
.*: 3040 00c0 li \$2,192
|
|
# ^ low 16 bits of f_lo_du_dc@plt
|
|
.*: 3040 0080 li \$2,128
|
|
# ^ low 16 bits of f_lo_du_ic@plt
|
|
.*: 3040 0040 li \$2,64
|
|
# ^ low 16 bits of f_lo_du_ic_dc@plt
|
|
.*: 3040 0020 li \$2,32
|
|
# ^ low 16 bits of f_lo_iu@plt
|
|
.*: 3040 0060 li \$2,96
|
|
# ^ low 16 bits of f_lo_iu_dc@plt
|
|
.*: 3040 00a0 li \$2,160
|
|
# ^ low 16 bits of f_lo_iu_ic@plt
|
|
.*: 3040 0190 li \$2,400
|
|
# ^ low 16 bits of f_lo_iu_ic_dc@plt
|
|
.*: 3040 0130 li \$2,304
|
|
# ^ low 16 bits of f_lo_iu_du@plt
|
|
.*: 3040 0030 li \$2,48
|
|
# ^ low 16 bits of f_lo_iu_du_dc@plt
|
|
.*: 3040 01a0 li \$2,416
|
|
# ^ low 16 bits of f_lo_iu_du_ic@plt
|
|
.*: 3040 01b0 li \$2,432
|
|
# ^ low 16 bits of f_lo_iu_du_ic_dc@plt
|
|
|