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7361da2c95
bfd/ * aoutx.h (NAME (aout, machine_type)): Add mips32r6 and mips64r6. * archures.c (bfd_architecture): Likewise. * bfd-in2.h (bfd_architecture): Likewise. (bfd_reloc_code_real): Add relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * cpu-mips.c (arch_info_struct): Add mips32r6 and mips64r6. * elf32-mips.c: Define relocs R_MIPS_PC21_S2, R_MIPS_PC26_S2 R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elf64-mips.c: Define REL, and RELA relocations R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (mips_reloc_map): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. * elfn32-mips.c: Likewise. * elfxx-mips.c (MIPSR6_P): New define. (mipsr6_exec_plt_entry): New array. (hi16_reloc_p): Add support for R_MIPS_PCHI16. (lo16_reloc_p): Add support for R_MIPS_PCLO16. (aligned_pcrel_reloc_p): New function. (mips_elf_relocation_needs_la25_stub): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (mips_elf_calculate_relocation): Add support for relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (_bfd_elf_mips_mach): Add support for mips32r6 and mips64r6. (mips_elf_add_lo16_rel_addend): Add support for R_MIPS_PCHI16. (_bfd_mips_elf_check_relocs): Add support for relocs: R_MIPS_PC21_S2 and R_MIPS_PC26_S2. (_bfd_mips_elf_relocate_section): Add a check for unaligned pc relative relocs. (_bfd_mips_elf_finish_dynamic_symbol): Add support for MIPS r6 plt entry. (mips_set_isa_flags): Add support for mips32r6 and mips64r6. (_bfd_mips_elf_print_private_bfd_data): Likewise. (mips_32bit_flags_p): Add support for mips32r6. * libbfd.h (bfd_reloc_code_real_names): Add entries for BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. * reloc.c: Document relocs BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3 and BFD_RELOC_MIPS_19_PCREL_S2. binutils/ * readelf.c (get_machine_flags): Add support for mips32r6 and mips64r6. elfcpp/ * mips.h (E_MIPS_ARCH_32R6, E_MIPS_ARCH_64R6): New enum constants. gas/ * config/tc-mips.c (mips_nan2008): New static global. (mips_flag_nan2008): Removed. (LL_SC_FMT): New define. (COP12_FMT): Updated. (ISA_IS_R6): New define. (ISA_HAS_64BIT_REGS): Add mips64r6. (ISA_HAS_DROR): Likewise. (ISA_HAS_64BIT_FPRS): Add mips32r6 and mips64r6. (ISA_HAS_ROR): Likewise. (ISA_HAS_ODD_SINGLE_FPR): Likewise. (ISA_HAS_MXHC1): Likewise. (hilo_interlocks): Likewise. (md_longopts): Likewise. (ISA_HAS_LEGACY_NAN): New define. (options): Add OPTION_MIPS32R6 and OPTION_MIPS64R6. (mips_ase): Add field rem_rev. (mips_ases): Updated to add which ISA an ASE was removed in. (mips_isa_rev): Add support for mips32r6 and mips64r6. (mips_check_isa_supports_ase): Add support to check if an ASE has been removed in the specified MIPS ISA revision. (validate_mips_insn): Skip '-' character. (macro_build): Likewise. (mips_check_options): Prevent R6 working with fp32, mips16, micromips, or branch relaxation. (file_mips_check_options): Set R6 floating point registers to 64 bit. Also deal with the nan2008 option. (limited_pcrel_reloc_p): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (operand_reg_mask): Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (match_check_prev_operand): New static function. (match_same_rs_rt_operand): New static function. (match_non_zero_reg_operand): New static function. (match_operand): Added entries for: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. (insns_between): Added case to deal with forbidden slots. (append_insn): Added support for relocs: BFD_RELOC_MIPS_21_PCREL_S2 and BFD_RELOC_MIPS_26_PCREL_S2. (match_insn): Add support for operands -A, -B, +' and +". Also skip '-' character. (mips_percent_op): Add entries for %pcrel_hi and %pcrel_lo. (md_parse_option): Add support for mips32r6 and mips64r6. Also update the nan option handling. (md_pcrel_from): Add cases for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2. (mips_force_relocation): Prevent forced relaxation for MIPS r6. (md_apply_fix): Add support for relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (s_mipsset): Add support for mips32r6 and mips64r6. (s_nan): Update to support the new nan2008 framework. (tc_gen_reloc): Add relocs: BFD_RELOC_MIPS_21_PCREL_S2, BFD_RELOC_MIPS_26_PCREL_S2, BFD_RELOC_MIPS_18_PCREL_S3, BFD_RELOC_MIPS_19_PCREL_S2, BFD_RELOC_HI16_S_PCREL and BFD_RELOC_LO16_PCREL. (mips_elf_final_processing): Updated to use the mips_nan2008. (mips_cpu_info_table): Add entries for mips32r6 and mips64r6. (macro): Enable ldc2, sdc2, ll, lld, swc2, sc, scd, cache, pref macros for R6. (mips_fix_adjustable): Make PC relative R6 relocations relative to the symbol and not the section. * configure.ac: Add support for mips32r6 and mips64r6. * configure: Regenerate. * doc/c-mips.texi: Document the -mips32r6 and -mips64r6 command line options. * doc/as.texinfo: Likewise. gas/testsuite/ * gas/mips/24k-triple-stores-1.s: If testing for r6 prevent non-supported instructions from being tested. * gas/mips/24k-triple-stores-2.s: Likewise. * gas/mips/24k-triple-stores-3.s: Likewise. * gas/mips/24k-triple-stores-6.s: Likewise. * gas/mips/beq.s: Likewise. * gas/mips/eva.s: Likewise. * gas/mips/ld-zero-3.s: Likewise. * gas/mips/mips32-cp2.s: Likewise. * gas/mips/mips32.s: Likewise. * gas/mips/mips4.s: Likewise. * gas/mips/add.s: Don't test the add instructions if r6, and add padding. * gas/mips/add.d: Check for a triple dot not a nop at the end of the disassembly output. * gas/mips/micromips@add.d: Likewise. * gas/mips/mipsr6@24k-branch-delay-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-1.d: New file. * gas/mips/mipsr6@24k-triple-stores-2-llsc.d: New file. * gas/mips/mipsr6@24k-triple-stores-2.d: New file. * gas/mips/mipsr6@24k-triple-stores-3.d: New file. * gas/mips/mipsr6@24k-triple-stores-6.d: New file. * gas/mips/mipsr6@add.d: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msingle-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-1-msoft-float.s: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.l: New file. * gas/mips/mipsr6@attr-gnu-4-2-mdouble-float.s: New file. * gas/mips/mipsr6@beq.d: New file. * gas/mips/mipsr6@bge.d: New file. * gas/mips/mipsr6@bgeu.d: New file. * gas/mips/mipsr6@blt.d: New file. * gas/mips/mipsr6@bltu.d: New file. * gas/mips/mipsr6@branch-misc-1.d: New file. * gas/mips/mipsr6@branch-misc-2-64.d: New file. * gas/mips/mipsr6@branch-misc-2pic-64.d: New file. * gas/mips/mipsr6@branch-misc-4-64.d: New file. * gas/mips/mipsr6@cache.d: New file. * gas/mips/mipsr6@eva.d: New file. * gas/mips/mipsr6@jal-svr4pic-noreorder.d: New file. * gas/mips/mipsr6@jal-svr4pic.d: New file. * gas/mips/mipsr6@ld-zero-2.d: New file. * gas/mips/mipsr6@ld-zero-3.d: New file. * gas/mips/mipsr6@loc-swap-dis.d: New file. * gas/mips/mipsr6@mips32-cp2.d: New file. * gas/mips/mipsr6@mips32-imm.d: New file. * gas/mips/mipsr6@mips32.d: New file. * gas/mips/mipsr6@mips32r2.d: New file. * gas/mips/mipsr6@mips4-fp.d: New file. * gas/mips/mipsr6@mips4-fp.l: New file. * gas/mips/mipsr6@mips4-fp.s: New file. * gas/mips/mipsr6@mips4.d: New file. * gas/mips/mipsr6@mips5-fp.d: New file. * gas/mips/mipsr6@mips5-fp.l: New file. * gas/mips/mipsr6@mips5-fp.s: New file. * gas/mips/mipsr6@mips64.d: New file. * gas/mips/mipsr6@msa-branch.d: New file. * gas/mips/mipsr6@msa.d: New file. * gas/mips/mipsr6@pref.d: New file. * gas/mips/mipsr6@relax-swap3.d: New file. * gas/mips/r6-64-n32.d: New file. * gas/mips/r6-64-n64.d: New file. * gas/mips/r6-64-removed.l: New file. * gas/mips/r6-64-removed.s: New file. * gas/mips/r6-64.s: New file. * gas/mips/r6-attr-none-double.d: New file. * gas/mips/r6-n32.d: New file. * gas/mips/r6-n64.d: New file. * gas/mips/r6-removed.l: New file. * gas/mips/r6-removed.s: New file. * gas/mips/r6.d: New file. * gas/mips/r6.s: New file. * gas/mips/mipsr6@mips32-dsp.d: New file. * gas/mips/mipsr6@mips32-dspr2.d: New file. * gas/mips/mipsr6@mips32r2-ill.l: New file. * gas/mips/mipsr6@mips32r2-ill.s: New file. * gas/mips/cache.s: Add r6 instruction varients. * gas/mips/mips.exp: Add support for the mips32r6 and mips64r6 architectures. Also prevent non r6 supported tests from running. Finally, add in support for running the new r6 tests. (run_dump_test_arch): Add support for mipsr6 tests. (run_list_test_arch): Add support for using files of the form arch@testname.l . include/elf/ * mips.h: Add relocs: R_MIPS_PC21_S2, R_MIPS_PC26_S2, R_MIPS_PC18_S3, R_MIPS_PC19_S2, R_MIPS_PCHI16 and R_MIPS_PCLO16. (E_MIPS_ARCH_32R6): New define. (E_MIPS_ARCH_64R6): New define. include/opcode/ * mips.h (mips_operand_type): Add new entries: OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Add descriptions for the MIPS R6 instruction arguments: -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (mips_check_prev_operand): New struct. (INSN2_FORBIDDEN_SLOT): New define. (INSN_ISA32R6): New define. (INSN_ISA64R6): New define. (INSN_UPTO32R6): New define. (INSN_UPTO64R6): New define. (mips_isa_table): Add INSN_UPTO32R6 and INSN_UPTO64R6. (ISA_MIPS32R6): New define. (ISA_MIPS64R6): New define. (CPU_MIPS32R6): New define. (CPU_MIPS64R6): New define. (cpu_is_member): Add cases for CPU_MIPS32R6, and CPU_MIPS64R6. ld/ * ldmain.c (get_emulation): Add support for -mips32r6 and -mips64r6. opcodes/ * mips-dis.c (mips_arch_choices): Add entries for mips32r6 and mips64r6. (parse_mips_dis_option): Allow MSA and virtualization support for mips64r6. (mips_print_arg_state): Add fields dest_regno and seen_dest. (mips_seen_register): New function. (print_insn_arg): Refactored code to use mips_seen_register function. Add support for OP_SAME_RS_RT, OP_CHECK_PREV and OP_NON_ZERO_REG. Changed OP_REPEAT_DEST_REG case to print out the register rather than aborting. (print_insn_args): Add length argument. Add code to correctly calculate the instruction address for pc relative instructions. (validate_insn_args): New static function. (print_insn_mips): Prevent jalx disassembling for r6. Use validate_insn_args. (print_insn_micromips): Use validate_insn_args. all the arguments are valid. * mips-formats.h (PREV_CHECK): New define. * mips-opc.c (decode_mips_operand): Add support for -a, -b, -d, -s, -t, -u, -v, -w, -x, -y, -A, -B, +I, +O, +R, +:, +\, +", +; (RD_pc): New define. (FS): New define. (I37): New define. (I69): New define. (mips_builtin_opcodes): Add MIPS R6 instructions. Exclude recoded MIPS R6 instructions from MIPS R2 instructions.
382 lines
11 KiB
C++
382 lines
11 KiB
C++
// mips.h -- ELF definitions specific to EM_MIPS -*- C++ -*-
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// Copyright (C) 2012-2014 Free Software Foundation, Inc.
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// Written by Sasa Stankovic <sasa.stankovic@imgtec.com>
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// and Aleksandar Simeonov <aleksandar.simeonov@rt-rk.com>.
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// This file is part of elfcpp.
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// This program is free software; you can redistribute it and/or
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// modify it under the terms of the GNU Library General Public License
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// as published by the Free Software Foundation; either version 2, or
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// (at your option) any later version.
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// In addition to the permissions in the GNU Library General Public
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// License, the Free Software Foundation gives you unlimited
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// permission to link the compiled version of this file into
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// combinations with other programs, and to distribute those
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// combinations without any restriction coming from the use of this
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// file. (The Library Public License restrictions do apply in other
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// respects; for example, they cover modification of the file, and
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/// distribution when not linked into a combined executable.)
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// This program is distributed in the hope that it will be useful, but
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// WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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// Library General Public License for more details.
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// You should have received a copy of the GNU Library General Public
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// License along with this program; if not, write to the Free Software
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// Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, MA
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// 02110-1301, USA.
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#ifndef ELFCPP_MIPS_H
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#define ELFCPP_MIPS_H
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// Documentation for the MIPS relocs is taken from
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// http://math-atlas.sourceforge.net/devel/assembly/mipsabi32.pdf
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namespace elfcpp
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{
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//
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// MIPS Relocation Codes
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//
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enum
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{
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R_MIPS_NONE = 0,
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R_MIPS_16 = 1,
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R_MIPS_32 = 2, // In Elf 64: alias R_MIPS_ADD
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R_MIPS_REL32 = 3, // In Elf 64: alias R_MIPS_REL
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R_MIPS_26 = 4,
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R_MIPS_HI16 = 5,
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R_MIPS_LO16 = 6,
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R_MIPS_GPREL16 = 7, // In Elf 64: alias R_MIPS_GPREL
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R_MIPS_LITERAL = 8,
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R_MIPS_GOT16 = 9, // In Elf 64: alias R_MIPS_GOT
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R_MIPS_PC16 = 10,
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R_MIPS_CALL16 = 11, // In Elf 64: alias R_MIPS_CALL
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R_MIPS_GPREL32 = 12,
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R_MIPS_UNUSED1 = 13,
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R_MIPS_UNUSED2 = 14,
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R_MIPS_UNUSED3 = 15,
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R_MIPS_SHIFT5 = 16,
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R_MIPS_SHIFT6 = 17,
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R_MIPS_64 = 18,
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R_MIPS_GOT_DISP = 19,
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R_MIPS_GOT_PAGE = 20,
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R_MIPS_GOT_OFST = 21,
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R_MIPS_GOT_HI16 = 22,
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R_MIPS_GOT_LO16 = 23,
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R_MIPS_SUB = 24,
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R_MIPS_INSERT_A = 25,
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R_MIPS_INSERT_B = 26,
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R_MIPS_DELETE = 27,
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R_MIPS_HIGHER = 28,
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R_MIPS_HIGHEST = 29,
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R_MIPS_CALL_HI16 = 30,
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R_MIPS_CALL_LO16 = 31,
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R_MIPS_SCN_DISP = 32,
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R_MIPS_REL16 = 33,
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R_MIPS_ADD_IMMEDIATE = 34,
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R_MIPS_PJUMP = 35,
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R_MIPS_RELGOT = 36,
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R_MIPS_JALR = 37,
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// TLS relocations.
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R_MIPS_TLS_DTPMOD32 = 38,
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R_MIPS_TLS_DTPREL32 = 39,
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R_MIPS_TLS_DTPMOD64 = 40,
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R_MIPS_TLS_DTPREL64 = 41,
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R_MIPS_TLS_GD = 42,
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R_MIPS_TLS_LDM = 43,
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R_MIPS_TLS_DTPREL_HI16 = 44,
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R_MIPS_TLS_DTPREL_LO16 = 45,
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R_MIPS_TLS_GOTTPREL = 46,
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R_MIPS_TLS_TPREL32 = 47,
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R_MIPS_TLS_TPREL64 = 48,
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R_MIPS_TLS_TPREL_HI16 = 49,
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R_MIPS_TLS_TPREL_LO16 = 50,
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R_MIPS_GLOB_DAT = 51,
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// These relocs are used for the mips16.
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R_MIPS16_26 = 100,
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R_MIPS16_GPREL = 101,
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R_MIPS16_GOT16 = 102,
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R_MIPS16_CALL16 = 103,
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R_MIPS16_HI16 = 104,
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R_MIPS16_LO16 = 105,
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R_MIPS16_TLS_GD = 106,
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R_MIPS16_TLS_LDM = 107,
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R_MIPS16_TLS_DTPREL_HI16 = 108,
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R_MIPS16_TLS_DTPREL_LO16 = 109,
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R_MIPS16_TLS_GOTTPREL = 110,
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R_MIPS16_TLS_TPREL_HI16 = 111,
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R_MIPS16_TLS_TPREL_LO16 = 112,
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R_MIPS_COPY = 126,
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R_MIPS_JUMP_SLOT = 127,
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// These relocations are specific to microMIPS.
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R_MICROMIPS_26_S1 = 133,
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R_MICROMIPS_HI16 = 134,
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R_MICROMIPS_LO16 = 135,
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R_MICROMIPS_GPREL16 = 136, // In Elf 64: alias R_MICROMIPS_GPREL
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R_MICROMIPS_LITERAL = 137,
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R_MICROMIPS_GOT16 = 138, // In Elf 64: alias R_MICROMIPS_GOT
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R_MICROMIPS_PC7_S1 = 139,
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R_MICROMIPS_PC10_S1 = 140,
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R_MICROMIPS_PC16_S1 = 141,
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R_MICROMIPS_CALL16 = 142, // In Elf 64: alias R_MICROMIPS_CALL
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R_MICROMIPS_GOT_DISP = 145,
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R_MICROMIPS_GOT_PAGE = 146,
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R_MICROMIPS_GOT_OFST = 147,
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R_MICROMIPS_GOT_HI16 = 148,
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R_MICROMIPS_GOT_LO16 = 149,
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R_MICROMIPS_SUB = 150,
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R_MICROMIPS_HIGHER = 151,
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R_MICROMIPS_HIGHEST = 152,
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R_MICROMIPS_CALL_HI16 = 153,
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R_MICROMIPS_CALL_LO16 = 154,
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R_MICROMIPS_SCN_DISP = 155,
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R_MICROMIPS_JALR = 156,
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R_MICROMIPS_HI0_LO16 = 157,
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// TLS relocations.
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R_MICROMIPS_TLS_GD = 162,
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R_MICROMIPS_TLS_LDM = 163,
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R_MICROMIPS_TLS_DTPREL_HI16 = 164,
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R_MICROMIPS_TLS_DTPREL_LO16 = 165,
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R_MICROMIPS_TLS_GOTTPREL = 166,
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R_MICROMIPS_TLS_TPREL_HI16 = 169,
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R_MICROMIPS_TLS_TPREL_LO16 = 170,
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// microMIPS GP- and PC-relative relocations.
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R_MICROMIPS_GPREL7_S2 = 172,
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R_MICROMIPS_PC23_S2 = 173,
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// This was a GNU extension used by embedded-PIC. It was co-opted by
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// mips-linux for exception-handling data. GCC stopped using it in
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// May, 2004, then started using it again for compact unwind tables.
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R_MIPS_PC32 = 248,
|
|
R_MIPS_EH = 249,
|
|
// This relocation is used internally by gas.
|
|
R_MIPS_GNU_REL16_S2 = 250,
|
|
// These are GNU extensions to enable C++ vtable garbage collection.
|
|
R_MIPS_GNU_VTINHERIT = 253,
|
|
R_MIPS_GNU_VTENTRY = 254
|
|
};
|
|
|
|
// Processor specific flags for the ELF header e_flags field.
|
|
enum
|
|
{
|
|
// At least one .noreorder directive appears in the source.
|
|
EF_MIPS_NOREORDER = 0x00000001,
|
|
// File contains position independent code.
|
|
EF_MIPS_PIC = 0x00000002,
|
|
// Code in file uses the standard calling sequence for calling
|
|
// position independent code.
|
|
EF_MIPS_CPIC = 0x00000004,
|
|
// ??? Unknown flag, set in IRIX 6's BSDdup2.o in libbsd.a.
|
|
EF_MIPS_XGOT = 0x00000008,
|
|
// Code in file uses UCODE (obsolete)
|
|
EF_MIPS_UCODE = 0x00000010,
|
|
// Code in file uses new ABI (-n32 on Irix 6).
|
|
EF_MIPS_ABI2 = 0x00000020,
|
|
// Process the .MIPS.options section first by ld
|
|
EF_MIPS_OPTIONS_FIRST = 0x00000080,
|
|
// Architectural Extensions used by this file
|
|
EF_MIPS_ARCH_ASE = 0x0f000000,
|
|
// Use MDMX multimedia extensions
|
|
EF_MIPS_ARCH_ASE_MDMX = 0x08000000,
|
|
// Use MIPS-16 ISA extensions
|
|
EF_MIPS_ARCH_ASE_M16 = 0x04000000,
|
|
// Use MICROMIPS ISA extensions.
|
|
EF_MIPS_ARCH_ASE_MICROMIPS = 0x02000000,
|
|
// Indicates code compiled for a 64-bit machine in 32-bit mode.
|
|
// (regs are 32-bits wide.)
|
|
EF_MIPS_32BITMODE = 0x00000100,
|
|
// MIPS dynamic
|
|
EF_MIPS_DYNAMIC = 0x40
|
|
};
|
|
|
|
// Machine variant if we know it. This field was invented at Cygnus,
|
|
// but it is hoped that other vendors will adopt it. If some standard
|
|
// is developed, this code should be changed to follow it.
|
|
enum
|
|
{
|
|
EF_MIPS_MACH = 0x00FF0000,
|
|
|
|
// Cygnus is choosing values between 80 and 9F;
|
|
// 00 - 7F should be left for a future standard;
|
|
// the rest are open.
|
|
|
|
E_MIPS_MACH_3900 = 0x00810000,
|
|
E_MIPS_MACH_4010 = 0x00820000,
|
|
E_MIPS_MACH_4100 = 0x00830000,
|
|
E_MIPS_MACH_4650 = 0x00850000,
|
|
E_MIPS_MACH_4120 = 0x00870000,
|
|
E_MIPS_MACH_4111 = 0x00880000,
|
|
E_MIPS_MACH_SB1 = 0x008a0000,
|
|
E_MIPS_MACH_OCTEON = 0x008b0000,
|
|
E_MIPS_MACH_XLR = 0x008c0000,
|
|
E_MIPS_MACH_OCTEON2 = 0x008d0000,
|
|
E_MIPS_MACH_OCTEON3 = 0x008e0000,
|
|
E_MIPS_MACH_5400 = 0x00910000,
|
|
E_MIPS_MACH_5500 = 0x00980000,
|
|
E_MIPS_MACH_9000 = 0x00990000,
|
|
E_MIPS_MACH_LS2E = 0x00A00000,
|
|
E_MIPS_MACH_LS2F = 0x00A10000,
|
|
E_MIPS_MACH_LS3A = 0x00A20000,
|
|
};
|
|
|
|
// MIPS architecture
|
|
enum
|
|
{
|
|
// Four bit MIPS architecture field.
|
|
EF_MIPS_ARCH = 0xf0000000,
|
|
// -mips1 code.
|
|
E_MIPS_ARCH_1 = 0x00000000,
|
|
// -mips2 code.
|
|
E_MIPS_ARCH_2 = 0x10000000,
|
|
// -mips3 code.
|
|
E_MIPS_ARCH_3 = 0x20000000,
|
|
// -mips4 code.
|
|
E_MIPS_ARCH_4 = 0x30000000,
|
|
// -mips5 code.
|
|
E_MIPS_ARCH_5 = 0x40000000,
|
|
// -mips32 code.
|
|
E_MIPS_ARCH_32 = 0x50000000,
|
|
// -mips64 code.
|
|
E_MIPS_ARCH_64 = 0x60000000,
|
|
// -mips32r2 code.
|
|
E_MIPS_ARCH_32R2 = 0x70000000,
|
|
// -mips64r2 code.
|
|
E_MIPS_ARCH_64R2 = 0x80000000,
|
|
// -mips32r6 code.
|
|
E_MIPS_ARCH_32R6 = 0x90000000,
|
|
// -mips64r6 code.
|
|
E_MIPS_ARCH_64R6 = 0xa0000000,
|
|
};
|
|
|
|
enum
|
|
{
|
|
// Mask to extract ABI version, not really a flag value.
|
|
EF_MIPS_ABI = 0x0000F000,
|
|
|
|
// The original o32 abi.
|
|
E_MIPS_ABI_O32 = 0x00001000,
|
|
// O32 extended to work on 64 bit architectures
|
|
E_MIPS_ABI_O64 = 0x00002000,
|
|
// EABI in 32 bit mode
|
|
E_MIPS_ABI_EABI32 = 0x00003000,
|
|
// EABI in 64 bit mode
|
|
E_MIPS_ABI_EABI64 = 0x00004000,
|
|
};
|
|
|
|
// Dynamic section MIPS flags
|
|
enum
|
|
{
|
|
// None
|
|
RHF_NONE = 0x00000000,
|
|
// Use shortcut pointers
|
|
RHF_QUICKSTART = 0x00000001,
|
|
// Hash size not power of two
|
|
RHF_NOTPOT = 0x00000002,
|
|
// Ignore LD_LIBRARY_PATH
|
|
RHF_NO_LIBRARY_REPLACEMENT = 0x00000004
|
|
};
|
|
|
|
// Special values for the st_other field in the symbol table.
|
|
enum
|
|
{
|
|
// Two topmost bits denote the MIPS ISA for .text symbols:
|
|
// + 00 -- standard MIPS code,
|
|
// + 10 -- microMIPS code,
|
|
// + 11 -- MIPS16 code; requires the following two bits to be set too.
|
|
// Note that one of the MIPS16 bits overlaps with STO_MIPS_PIC.
|
|
STO_MIPS_ISA = 0xc0,
|
|
|
|
// The mask spanning the rest of MIPS psABI flags. At most one is expected
|
|
// to be set except for STO_MIPS16.
|
|
STO_MIPS_FLAGS = ~(STO_MIPS_ISA | 0x3),
|
|
|
|
// The MIPS psABI was updated in 2008 with support for PLTs and copy
|
|
// relocs. There are therefore two types of nonzero SHN_UNDEF functions:
|
|
// PLT entries and traditional MIPS lazy binding stubs. We mark the former
|
|
// with STO_MIPS_PLT to distinguish them from the latter.
|
|
STO_MIPS_PLT = 0x8,
|
|
|
|
// This value is used to mark PIC functions in an object that mixes
|
|
// PIC and non-PIC. Note that this bit overlaps with STO_MIPS16,
|
|
// although MIPS16 symbols are never considered to be MIPS_PIC.
|
|
STO_MIPS_PIC = 0x20,
|
|
|
|
// This value is used for a mips16 .text symbol.
|
|
STO_MIPS16 = 0xf0,
|
|
|
|
// This value is used for a microMIPS .text symbol. To distinguish from
|
|
// STO_MIPS16, we set top two bits to be 10 to denote STO_MICROMIPS. The
|
|
// mask is STO_MIPS_ISA.
|
|
STO_MICROMIPS = 0x80
|
|
};
|
|
|
|
// Values for base offsets for thread-local storage
|
|
enum
|
|
{
|
|
TP_OFFSET = 0x7000,
|
|
DTP_OFFSET = 0x8000
|
|
};
|
|
|
|
|
|
bool
|
|
elf_st_is_mips16(unsigned char st_other)
|
|
{ return (st_other & elfcpp::STO_MIPS16) == elfcpp::STO_MIPS16; }
|
|
|
|
bool
|
|
elf_st_is_micromips(unsigned char st_other)
|
|
{ return (st_other & elfcpp::STO_MIPS_ISA) == elfcpp::STO_MICROMIPS; }
|
|
|
|
// Whether the ABI is N32.
|
|
bool
|
|
abi_n32(elfcpp::Elf_Word e_flags)
|
|
{ return (e_flags & elfcpp::EF_MIPS_ABI2) != 0; }
|
|
|
|
// Whether the ABI is N64.
|
|
bool
|
|
abi_64(unsigned char ei_class)
|
|
{ return ei_class == elfcpp::ELFCLASS64; }
|
|
|
|
// Whether the file has microMIPS code.
|
|
bool
|
|
is_micromips(elfcpp::Elf_Word e_flags)
|
|
{ return (e_flags & elfcpp::EF_MIPS_ARCH_ASE_MICROMIPS) != 0; }
|
|
|
|
// Values which may appear in the kind field of an Elf_Options structure.
|
|
enum
|
|
{
|
|
// Undefined.
|
|
ODK_NULL = 0,
|
|
// Register usage and GP value.
|
|
ODK_REGINFO = 1,
|
|
// Exception processing information.
|
|
ODK_EXCEPTIONS = 2,
|
|
// Section padding information.
|
|
ODK_PAD = 3,
|
|
// Hardware workarounds performed.
|
|
ODK_HWPATCH = 4,
|
|
// Fill value used by the linker.
|
|
ODK_FILL = 5,
|
|
// Reserved space for desktop tools.
|
|
ODK_TAGS = 6,
|
|
// Hardware workarounds, AND bits when merging.
|
|
ODK_HWAND = 7,
|
|
// Hardware workarounds, OR bits when merging.
|
|
ODK_HWOR = 8,
|
|
// GP group to use for text/data sections.
|
|
ODK_GP_GROUP = 9,
|
|
// ID information.
|
|
ODK_IDENT = 10
|
|
};
|
|
|
|
} // End namespace elfcpp.
|
|
|
|
#endif // !defined(ELFCPP_MIPS_H)
|