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https://sourceware.org/git/binutils-gdb.git
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440 lines
14 KiB
Plaintext
440 lines
14 KiB
Plaintext
2012-07-05 Thomas Schwinge <thomas@codesourcery.com>
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* mips-dis.c: Remove gratuitous newline.
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2012-07-02 Roland McGrath <mcgrathr@google.com>
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* i386-opc.tbl: Add RepPrefixOk to nop.
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* i386-tbl.h: Regenerate.
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2012-06-28 Nick Clifton <nickc@redhat.com>
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* po/vi.po: Updated Vietnamese translation.
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2012-06-22 Roland McGrath <mcgrathr@google.com>
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* i386-opc.tbl: Add RepPrefixOk to ret.
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* i386-tbl.h: Regenerate.
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* i386-opc.h (RepPrefixOk): New enum constant.
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(i386_opcode_modifier): New bitfield 'repprefixok'.
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* i386-gen.c (opcode_modifiers): Add RepPrefixOk.
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* i386-opc.tbl: Add RepPrefixOk to bsf, bsr, and to all
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instructions that have IsString.
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* i386-tbl.h: Regenerate.
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2012-06-11 Andreas Schwab <schwab@linux-m68k.org>
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* ppc-opc.c (lvsl, lvebx, isellt, icbt, ldepx, lwepx, lvsr, lvehx)
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(iselgt, lvewx, iseleq, isel, dcbst, dcbstep, dcbfl, dcbf, lbepx)
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(lvx, dcbfep, dcbtstls, stvebx, dcbtstlse, stdepx, stwepx, dcbtls)
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(stvehx, dcbtlse, stvewx, stbepx, icblc, stvx, dcbtstt, dcbtst)
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(dcbtst, dcbtstep, dcbtt, dcbt, dcbt, lhepx, eciwx, dcbtep)
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(dcread, lxvdsx, lvxl, dcblc, sthepx, ecowx, dcbi, dcread, icbtls)
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(stvxl, lxsdx, lfdepx, stxsdx, stfdepx, dcba, dcbal, lxvw4x)
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(tlbivax, lfdpx, lxvd2x, tlbsrx., stxvw4x, tlbsx, tlbsx., stfdpx)
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(stfqx, stxvd2x, icbi, icbiep, icread, dcbzep): Change RA to RA0.
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2012-05-19 Alan Modra <amodra@gmail.com>
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* ppc-dis.c: Don't include elf32-ppc.h, do include elf/ppc.h.
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(get_powerpc_dialect): Detect VLE sections from ELF sh_flags.
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2012-05-18 Alan Modra <amodra@gmail.com>
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* ia64-opc.c: Remove #include "ansidecl.h".
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* z8kgen.c: Include sysdep.h first.
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* arc-dis.c: Include sysdep.h first, remove some redundant includes.
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* bfin-dis.c: Likewise.
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* i860-dis.c: Likewise.
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* ia64-dis.c: Likewise.
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* ia64-gen.c: Likewise.
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* m68hc11-dis.c: Likewise.
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* mmix-dis.c: Likewise.
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* msp430-dis.c: Likewise.
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* or32-dis.c: Likewise.
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* rl78-dis.c: Likewise.
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* rx-dis.c: Likewise.
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* tic4x-dis.c: Likewise.
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* tilegx-opc.c: Likewise.
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* tilepro-opc.c: Likewise.
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* rx-decode.c: Regenerate.
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2012-05-17 James Lemke <jwlemke@codesourcery.com>
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* ppc-opc.c (powerpc_macros): Add entries for e_extlwi to e_clrlslwi.
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2012-05-17 James Lemke <jwlemke@codesourcery.com>
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* ppc-opc.c (extract_sprg): Use ALLOW8_SPRG to include VLE.
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2012-05-17 Daniel Richard G. <skunk@iskunk.org>
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Nick Clifton <nickc@redhat.com>
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PR 14072
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* configure.in: Add check that sysdep.h has been included before
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any system header files.
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* configure: Regenerate.
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* config.in: Regenerate.
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* sysdep.h: Generate an error if included before config.h.
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* alpha-opc.c: Include sysdep.h before any other header file.
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* alpha-dis.c: Likewise.
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* avr-dis.c: Likewise.
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* cgen-opc.c: Likewise.
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* cr16-dis.c: Likewise.
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* cris-dis.c: Likewise.
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* crx-dis.c: Likewise.
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* d10v-dis.c: Likewise.
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* d10v-opc.c: Likewise.
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* d30v-dis.c: Likewise.
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* d30v-opc.c: Likewise.
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* h8500-dis.c: Likewise.
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* i370-dis.c: Likewise.
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* i370-opc.c: Likewise.
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* m10200-dis.c: Likewise.
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* m10300-dis.c: Likewise.
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* micromips-opc.c: Likewise.
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* mips-opc.c: Likewise.
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* mips61-opc.c: Likewise.
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* moxie-dis.c: Likewise.
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* or32-opc.c: Likewise.
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* pj-dis.c: Likewise.
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* ppc-dis.c: Likewise.
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* ppc-opc.c: Likewise.
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* s390-dis.c: Likewise.
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* sh-dis.c: Likewise.
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* sh64-dis.c: Likewise.
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* sparc-dis.c: Likewise.
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* sparc-opc.c: Likewise.
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* spu-dis.c: Likewise.
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* tic30-dis.c: Likewise.
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* tic54x-dis.c: Likewise.
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* tic80-dis.c: Likewise.
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* tic80-opc.c: Likewise.
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* tilegx-dis.c: Likewise.
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* tilepro-dis.c: Likewise.
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* v850-dis.c: Likewise.
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* v850-opc.c: Likewise.
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* vax-dis.c: Likewise.
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* w65-dis.c: Likewise.
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* xgate-dis.c: Likewise.
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* xtensa-dis.c: Likewise.
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* rl78-decode.opc: Likewise.
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* rl78-decode.c: Regenerate.
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* rx-decode.opc: Likewise.
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* rx-decode.c: Regenerate.
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2012-05-17 Alan Modra <amodra@gmail.com>
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* ppc_dis.c: Don't include elf/ppc.h.
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2012-05-16 Meador Inge <meadori@codesourcery.com>
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* arm-dis.c (arm_opcodes): Don't disassemble STMFD/LDMIA sp!, {reg}
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to PUSH/POP {reg}.
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2012-05-15 James Murray <jsm@jsm-net.demon.co.uk>
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Stephane Carrez <stcarrez@nerim.fr>
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* configure.in: Add S12X and XGATE co-processor support to m68hc11
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target.
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* disassemble.c: Likewise.
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* configure: Regenerate.
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* m68hc11-dis.c: Make objdump output more consistent, use hex
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instead of decimal and use 0x prefix for hex.
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* m68hc11-opc.c: Add S12X and XGATE opcodes.
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2012-05-14 James Lemke <jwlemke@codesourcery.com>
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* ppc-dis.c (get_powerpc_dialect): Use is_ppc_vle.
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(PPC_OPCD_SEGS, VLE_OPCD_SEGS): New defines.
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(vle_opcd_indices): New array.
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(lookup_vle): New function.
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(disassemble_init_powerpc): Revise for second (VLE) opcode table.
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(print_insn_powerpc): Likewise.
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* ppc-opc.c: Likewise.
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2012-05-14 Catherine Moore <clm@codesourcery.com>
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Maciej W. Rozycki <macro@codesourcery.com>
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Rhonda Wittels <rhonda@codesourcery.com>
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Nathan Froyd <froydnj@codesourcery.com>
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* ppc-opc.c (insert_arx, extract_arx): New functions.
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(insert_ary, extract_ary): New functions.
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(insert_li20, extract_li20): New functions.
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(insert_rx, extract_rx): New functions.
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(insert_ry, extract_ry): New functions.
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(insert_sci8, extract_sci8): New functions.
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(insert_sci8n, extract_sci8n): New functions.
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(insert_sd4h, extract_sd4h): New functions.
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(insert_sd4w, extract_sd4w): New functions.
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(insert_vlesi, extract_vlesi): New functions.
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(insert_vlensi, extract_vlensi): New functions.
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(insert_vleui, extract_vleui): New functions.
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(insert_vleil, extract_vleil): New functions.
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(BI_MASK, BB_MASK, BT): Use PPC_OPERAND_CR_BIT.
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(BI16, BI32, BO32, B8): New.
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(B15, B24, CRD32, CRS): New.
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(CRD, OBF, BFA, CR, CRFS): Use PPC_OPERAND_CR_REG.
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(DB, IMM20, RD, Rx, ARX, RY, RZ): New.
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(ARY, SCLSCI8, SCLSCI8N, SE_SD, SE_SDH): New.
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(SH6_MASK): Use PPC_OPSHIFT_INV.
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(SI8, UI5, OIMM5, UI7, BO16): New.
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(VLESIMM, VLENSIMM, VLEUIMM, VLEUIMML): New.
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(XT6, XA6, XB6, XB6S, XC6): Use PPC_OPSHIFT_INV.
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(ALLOW8_SPRG): New.
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(insert_sprg, extract_sprg): Check ALLOW8_SPRG.
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(OPVUP, OPVUP_MASK OPVUP): New
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(BD8, BD8_MASK, BD8IO, BD8IO_MASK): New.
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(EBD8IO, EBD8IO1_MASK, EBD8IO2_MASK, EBD8IO3_MASK): New.
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(BD15, BD15_MASK, EBD15, EBD15_MASK, EBD15BI, EBD15BI_MASK): New.
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(BD24,BD24_MASK, C_LK, C_LK_MASK, C, C_MASK): New.
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(IA16, IA16_MASK, I16A, I16A_MASK, I16L, I16L_MASK): New.
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(IM7, IM7_MASK, LI20, LI20_MASK, SCI8, SCI8_MASK): New.
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(SCI8BF, SCI8BF_MASK, SD4, SD4_MASK): New.
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(SE_IM5, SE_IM5_MASK): New.
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(SE_R, SE_R_MASK, SE_RR, SE_RR_MASK): New.
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(EX, EX_MASK, BO16F, BO16T, BO32F, BO32T): New.
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(BO32DNZ, BO32DZ): New.
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(NO371, PPCSPE, PPCISEL, PPCEFS, MULHW): Include PPC_OPCODE_VLE.
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(PPCVLE): New.
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(powerpc_opcodes): Add new VLE instructions. Update existing
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instruction to include PPCVLE if supported.
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* ppc-dis.c (ppc_opts): Add vle entry.
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(get_powerpc_dialect): New function.
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(powerpc_init_dialect): VLE support.
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(print_insn_big_powerpc): Call get_powerpc_dialect.
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(print_insn_little_powerpc): Likewise.
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(operand_value_powerpc): Handle negative shift counts.
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(print_insn_powerpc): Handle 2-byte instruction lengths.
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2012-05-11 Daniel Richard G. <skunk@iskunk.org>
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PR binutils/14028
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* configure.in: Invoke ACX_HEADER_STRING.
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* configure: Regenerate.
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* config.in: Regenerate.
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* sysdep.h: If STRINGS_WITH_STRING is defined then include both
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string.h and strings.h.
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2012-05-11 Nick Clifton <nickc@redhat.com>
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PR binutils/14006
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* arm-dis.c (print_insn): Fix detection of instruction mode in
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files containing multiple executable sections.
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2012-05-03 Sean Keys <skeys@ipdatasys.com>
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* Makefile.in, configure: regenerate
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* disassemble.c (disassembler): Recognize ARCH_XGATE.
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* xgate-dis.c (read_memory, print_insn, print_insn_xgate):
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New functions.
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* configure.in: Recognize xgate.
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* xgate-dis.c, xgate-opc.c: New files for support of xgate
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* Makefile.am (CFILES, ALL_MACHINES): New files for disassembly
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and opcode generation for xgate.
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2012-04-30 DJ Delorie <dj@redhat.com>
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* rx-decode.opc (MOV): Do not sign-extend immediates which are
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already the maximum bit size.
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* rx-decode.c: Regenerate.
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2012-04-27 David S. Miller <davem@davemloft.net>
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* sparc-dis.c (v9a_asr_reg_names): Add 'cfr'.
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* sparc-opc.c (sparc_opcodes): Add rd/wr cases for %cfr.
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* sparc-opc.c (sparc_opcodes): Add 'wr X, %pause' and 'pause'.
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* sparc-dis.c (v9a_asr_reg_names): Add 'pause'.
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* sparc-opc.c (CBCOND): New define.
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(CBCOND_XCC): Likewise.
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(cbcond): New helper macro.
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(sparc_opcodes): Add compare-and-branch instructions.
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* sparc-dis.c (print_insn_sparc): Handle ')'.
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* sparc-opc.c (sparc_opcodes): Add crypto instructions.
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* sparc-opc.c (sparc_opcodes): Rework table to put HWCAP values
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into new struct sparc_opcode 'hwcaps' field instead of 'flags'.
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2012-04-12 David S. Miller <davem@davemloft.net>
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* sparc-dis.c (X_DISP10): Define.
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(print_insn_sparc): Handle '='.
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2012-04-01 Mike Frysinger <vapier@gentoo.org>
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* bfin-dis.c (fmtconst): Replace decimal handling with a single
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sprintf call and the '*' field width.
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2012-03-23 Maxim Kuvyrkov <maxim@codesourcery.com>
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* mips-dis.c (mips_arch_choices): Add entry for Broadcom XLP.
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2012-03-16 Alan Modra <amodra@gmail.com>
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* ppc-dis.c (PPC_OPC_SEGS, PPC_OP_TO_SEG): Delete.
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(powerpc_opcd_indices): Bump array size.
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(disassemble_init_powerpc): Set powerpc_opcd_indices entries
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corresponding to unused opcodes to following entry.
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(lookup_powerpc): New function, extracted and optimised from..
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(print_insn_powerpc): ..here.
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2012-03-15 Alan Modra <amodra@gmail.com>
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James Lemke <jwlemke@codesourcery.com>
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* disassemble.c (disassemble_init_for_target): Handle ppc init.
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* ppc-dis.c (private): New var.
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(powerpc_init_dialect): Don't return calloc failure, instead use
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private.
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(PPC_OPCD_SEGS, PPC_OP_TO_SEG): Define.
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(powerpc_opcd_indices): New array.
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(disassemble_init_powerpc): New function.
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(print_insn_big_powerpc): Don't init dialect here.
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(print_insn_little_powerpc): Likewise.
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(print_insn_powerpc): Start search using powerpc_opcd_indices.
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2012-03-10 Edmar Wienskoski <edmar@freescale.com>
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* ppc-dis.c (ppc_opts): Add entries for "e5500" and "e6500".
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* ppc-opc.c (insert_ls, TMR, ESYNC, XSYNCLE_MASK): New.
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(PPCVEC2, PPCTMR, E6500): New short names.
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(powerpc_opcodes): Add vabsdub, vabsduh, vabsduw, dni, mvidsplt,
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mviwsplt, icblq., mftmr, mttmr, dcblq., miso, lvexbx, lvexhx,
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lvexwx, stvexbx, stvexhx, stvexwx, lvepx, lvepxl, stvepx, stvepxl,
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lvtrx, lvtrxl, lvtlx, lvtlxl, stvfrx, stvfrxl, stvflx, stvflxl,
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lvswx, lvswxl, stvswx, stvswxl, lvsm mnemonics. Accept LS, ESYNC
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optional operands on sync instruction for E6500 target.
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2012-03-08 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
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* s390-opc.txt: Set instruction type of pku to SS_L2RDRD.
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2012-02-27 Alan Modra <amodra@gmail.com>
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* mt-dis.c: Regenerate.
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2012-02-27 Alan Modra <amodra@gmail.com>
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* v850-opc.c (extract_v8): Rearrange to make it obvious this
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is the inverse of corresponding insert function.
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(extract_d22, extract_u9, extract_r4): Likewise.
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(extract_d9): Correct sign extension.
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(extract_d16_15): Don't assume "long" is 32 bits, and don't
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rely on implementation defined behaviour for shift right of
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signed types.
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(extract_d16_16, extract_d17_16, extract_i9): Likewise.
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(extract_d23): Likewise, and correct mask.
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2012-02-27 Alan Modra <amodra@gmail.com>
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* crx-dis.c (print_arg): Mask constant to 32 bits.
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* crx-opc.c (cst4_map): Use int array.
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2012-02-27 Alan Modra <amodra@gmail.com>
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* arc-dis.c (BITS): Don't use shifts to mask off bits.
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(FIELDD): Sign extend with xor,sub.
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2012-02-25 Walter Lee <walt@tilera.com>
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* tilegx-opc.c: Handle TILEGX_OPC_LD4S_TLS and TILEGX_OPC_LD_TLS.
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* tilepro-opc.c: Handle TILEPRO_OPC_LW_TLS and
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TILEPRO_OPC_LW_TLS_SN.
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2012-02-21 H.J. Lu <hongjiu.lu@intel.com>
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* i386-opc.h (HLEPrefixNone): New.
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(HLEPrefixLock): Likewise.
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(HLEPrefixAny): Likewise.
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(HLEPrefixRelease): Likewise.
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2012-02-08 H.J. Lu <hongjiu.lu@intel.com>
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* i386-dis.c (HLE_Fixup1): New.
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(HLE_Fixup2): Likewise.
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(HLE_Fixup3): Likewise.
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(Ebh1): Likewise.
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(Evh1): Likewise.
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(Ebh2): Likewise.
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(Evh2): Likewise.
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(Ebh3): Likewise.
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(Evh3): Likewise.
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(MOD_C6_REG_7): Likewise.
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(MOD_C7_REG_7): Likewise.
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(RM_C6_REG_7): Likewise.
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(RM_C7_REG_7): Likewise.
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(XACQUIRE_PREFIX): Likewise.
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(XRELEASE_PREFIX): Likewise.
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(dis386): Use Ebh1/Evh1 on add, adc, and, btc, btr, bts,
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cmpxchg, dec, inc, neg, not, or, sbb, sub, xor and xadd. Use
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Ebh2/Evh2 on xchg. Use Ebh3/Evh3 on mov.
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(reg_table): Use Ebh1/Evh1 on add, adc, and, dec, inc, neg,
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not, or, sbb, sub and xor. Use Ebh3/Evh3 on mov. Use
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MOD_C6_REG_7 and MOD_C7_REG_7.
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(mod_table): Add MOD_C6_REG_7 and MOD_C7_REG_7.
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(rm_table): Add RM_C6_REG_7 and RM_C7_REG_7. Add xend and
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xtest.
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(prefix_name): Handle XACQUIRE_PREFIX and XRELEASE_PREFIX.
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(CMPXCHG8B_Fixup): Handle HLE prefix on cmpxchg8b.
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* i386-gen.c (cpu_flag_init): Add CPU_HLE_FLAGS and
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CPU_RTM_FLAGS.
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(cpu_flags): Add CpuHLE and CpuRTM.
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(opcode_modifiers): Add HLEPrefixOk.
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* i386-opc.h (CpuHLE): New.
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(CpuRTM): Likewise.
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(HLEPrefixOk): Likewise.
|
||
(i386_cpu_flags): Add cpuhle and cpurtm.
|
||
(i386_opcode_modifier): Add hleprefixok.
|
||
|
||
* i386-opc.tbl: Add HLEPrefixOk=3 to mov. Add HLEPrefixOk to
|
||
add, adc, and, btc, btr, bts, cmpxchg, dec, inc, neg, not, or,
|
||
sbb, sub, xor and xadd. Add HLEPrefixOk=2 to xchg with memory
|
||
operand. Add xacquire, xrelease, xabort, xbegin, xend and
|
||
xtest.
|
||
* i386-init.h: Regenerated.
|
||
* i386-tbl.h: Likewise.
|
||
|
||
2012-01-24 DJ Delorie <dj@redhat.com>
|
||
|
||
* rl78-decode.opc (rl78_decode_opcode): Add NOT1.
|
||
* rl78-decode.c: Regenerate.
|
||
|
||
2012-01-17 James Murray <jsm@jsm-net.demon.co.uk>
|
||
|
||
PR binutils/10173
|
||
* cr16-dis.c (print_arg): Test symtab_size not num_symbols.
|
||
|
||
2012-01-17 Andreas Schwab <schwab@linux-m68k.org>
|
||
|
||
* m68k-opc.c (m68k_opcodes): Fix entries for pmove with BADx/BACx
|
||
register and move them after pmove with PSR/PCSR register.
|
||
|
||
2012-01-13 H.J. Lu <hongjiu.lu@intel.com>
|
||
|
||
* i386-dis.c (mod_table): Add vmfunc.
|
||
|
||
* i386-gen.c (cpu_flag_init): Add CPU_VMFUNC_FLAGS.
|
||
(cpu_flags): CpuVMFUNC.
|
||
|
||
* i386-opc.h (CpuVMFUNC): New.
|
||
(i386_cpu_flags): Add cpuvmfunc.
|
||
|
||
* i386-opc.tbl: Add vmfunc.
|
||
* i386-init.h: Regenerated.
|
||
* i386-tbl.h: Likewise.
|
||
|
||
For older changes see ChangeLog-2011
|
||
|
||
Local Variables:
|
||
mode: change-log
|
||
left-margin: 8
|
||
fill-column: 74
|
||
version-control: never
|
||
End:
|