Matthieu Longo 46dace1933 aarch64: improve debuggability on array of enum ... The current space optmization on enum aarch64_opn_qualifier forced its encoding using an unsigned char. This "hard-coded" optimization has the bad consequence of making the array of such enums being completely unreadable when debugging with GDB because the enum type is lost along the way. Keeping this space optimization, and the enum type as well, is possible when the declaration of the enum is tagged with attribute((packed)). attribute((packed)) is a GNU extension, and is wrapped in the macro ATTRIBUTE_PACKED (defined in ansidecl.h), and should be used instead.		2024-11-08 11:35:46 +00:00
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aarch64.h	aarch64: improve debuggability on array of enum	2024-11-08 11:35:46 +00:00
alpha.h
arc-attrs.h
arc-func.h
arc.h
arm.h	arm, objdump: Make objdump use bfd's machine detection to drive disassembly	2024-11-08 10:06:38 +00:00
avr.h
bfin.h
bpf.h
cgen.h
ChangeLog-0415
ChangeLog-9103
convex.h
cr16.h
cris.h
crx.h
csky.h
d10v.h
d30v.h
dlx.h
ft32.h
h8300.h
hppa.h
i386.h
ia64.h
kvx.h
loongarch.h	Add macros to get opcode of instructions approriately	2024-09-07 10:06:03 +08:00
m68hc11.h
m68k.h
metag.h
mips.h	MIPS/opcodes: Rework documentation for instruction args	2024-09-15 13:27:33 +01:00
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430-decode.h
msp430.h
nds32.h
nfp.h
nios2.h
nios2r1.h
nios2r2.h
np1.h
ns32k.h
pdp11.h
pj.h
pn.h
ppc.h
pru.h
pyr.h
riscv-opc.h	RISC-V: Add Smrnmi extension csrs.	2024-09-25 09:28:27 +08:00
riscv.h	RISC-V: Add support for XCVsimd extension in CV32E40P	2024-09-03 12:02:28 +08:00
rl78.h
rx.h
s12z.h
s390.h	s390: Add arch15 instructions	2024-10-10 12:09:40 +02:00
score-datadep.h
score-inst.h
sparc.h
spu-insns.h
spu.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tilegx.h
tilepro.h
v850.h
vax.h
visium.h
wasm.h
xgate.h