binutils-gdb/ld/emulparams/aarch64fbsd.sh
Jim Wilson 9a2ebffd4d Ensure 8-byte alignment for AArch64 stubs.
PR 22903
bfd	* elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch
	and nop instead of 4.
	(elfNN_arch64_build_stubs): Add nop after branch.  Increase size by
	8 instead of 4.

ld	* emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section):
	Give stub_sec 8 byte alignment.
	* emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5.
	* emulparams/aarch64elf.sh (NOP): Likewise.
	* emulparams/aarch64elf32.sh (NOP): Likewise.
	* emulparams/aarch64fbsd.sh (NOP): Likewise.
	* emulparams/aarch64linux.sh (NOP): Likewise.
	* emulparams/aarch64linux32.sh (NOP): Likewise.
	* testsuite/ld-aarch64/erratum835769.d: Adjust for added nop.
	* testsuite/ld-aarch64/erratum843419.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-defsym.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-none-function.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-plt.d: Likewise.
	* testsuite/ld-aarch64/farcall-b-section.d: Likewise.
	* testsuite/ld-aarch64/farcall-b.d: Likewise.
	* testsuite/ld-aarch64/farcall-back.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-plt.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
	* testsuite/ld-aarch64/farcall-bl.d: Likewise.
2018-03-02 10:49:20 +00:00

38 lines
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ARCH=aarch64
MACHINE=
NOP=0x1f2003d5
SCRIPT_NAME=elf
ELFSIZE=64
OUTPUT_FORMAT="elf64-littleaarch64"
BIG_OUTPUT_FORMAT="elf64-bigaarch64"
LITTLE_OUTPUT_FORMAT="elf64-littleaarch64"
NO_REL_RELOCS=yes
TEMPLATE_NAME=elf32
EXTRA_EM_FILE=aarch64elf
GENERATE_SHLIB_SCRIPT=yes
GENERATE_PIE_SCRIPT=yes
MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
SEPARATE_GOTPLT=24
IREL_IN_PLT=
TEXT_START_ADDR=0x400000
DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
# AArch64 does not support .s* sections.
NO_SMALL_DATA=yes
OTHER_BSS_SYMBOLS='__bss_start__ = .;'
OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
OTHER_END_SYMBOLS='__end__ = . ;'
OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
ATTRS_SECTIONS='.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }'
# Ensure each PLT entry is aligned to a cache line.
PLT=".plt ${RELOCATING-0} : ALIGN(16) { *(.plt)${IREL_IN_PLT+ *(.iplt)} }"