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PR 22903 bfd * elfnn-aarch64.c (_bfd_aarch64_resize_stubs): Add 8 bytes for branch and nop instead of 4. (elfNN_arch64_build_stubs): Add nop after branch. Increase size by 8 instead of 4. ld * emultempl/aarch64elf.em (elf${ELFSIZE}_aarch64_add_stub_section): Give stub_sec 8 byte alignment. * emulparams/aarch64cloudabi.sh (NOP): Set to 0x1f2003d5. * emulparams/aarch64elf.sh (NOP): Likewise. * emulparams/aarch64elf32.sh (NOP): Likewise. * emulparams/aarch64fbsd.sh (NOP): Likewise. * emulparams/aarch64linux.sh (NOP): Likewise. * emulparams/aarch64linux32.sh (NOP): Likewise. * testsuite/ld-aarch64/erratum835769.d: Adjust for added nop. * testsuite/ld-aarch64/erratum843419.d: Likewise. * testsuite/ld-aarch64/farcall-b-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-b-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-b-plt.d: Likewise. * testsuite/ld-aarch64/farcall-b-section.d: Likewise. * testsuite/ld-aarch64/farcall-b.d: Likewise. * testsuite/ld-aarch64/farcall-back.d: Likewise. * testsuite/ld-aarch64/farcall-bl-defsym.d: Likewise. * testsuite/ld-aarch64/farcall-bl-none-function.d: Likewise. * testsuite/ld-aarch64/farcall-bl-plt.d: Likewise. * testsuite/ld-aarch64/farcall-bl-section.d: Likewise. * testsuite/ld-aarch64/farcall-bl.d: Likewise.
38 lines
984 B
Bash
38 lines
984 B
Bash
ARCH=aarch64
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MACHINE=
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NOP=0x1f2003d5
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SCRIPT_NAME=elf
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ELFSIZE=64
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OUTPUT_FORMAT="elf64-littleaarch64"
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BIG_OUTPUT_FORMAT="elf64-bigaarch64"
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LITTLE_OUTPUT_FORMAT="elf64-littleaarch64"
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NO_REL_RELOCS=yes
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TEMPLATE_NAME=elf32
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EXTRA_EM_FILE=aarch64elf
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GENERATE_SHLIB_SCRIPT=yes
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GENERATE_PIE_SCRIPT=yes
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MAXPAGESIZE="CONSTANT (MAXPAGESIZE)"
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COMMONPAGESIZE="CONSTANT (COMMONPAGESIZE)"
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SEPARATE_GOTPLT=24
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IREL_IN_PLT=
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TEXT_START_ADDR=0x400000
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DATA_START_SYMBOLS='PROVIDE (__data_start = .);';
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# AArch64 does not support .s* sections.
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NO_SMALL_DATA=yes
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OTHER_BSS_SYMBOLS='__bss_start__ = .;'
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OTHER_BSS_END_SYMBOLS='_bss_end__ = . ; __bss_end__ = . ;'
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OTHER_END_SYMBOLS='__end__ = . ;'
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OTHER_SECTIONS='.note.gnu.arm.ident 0 : { KEEP (*(.note.gnu.arm.ident)) }'
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ATTRS_SECTIONS='.ARM.attributes 0 : { KEEP (*(.ARM.attributes)) KEEP (*(.gnu.attributes)) }'
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# Ensure each PLT entry is aligned to a cache line.
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PLT=".plt ${RELOCATING-0} : ALIGN(16) { *(.plt)${IREL_IN_PLT+ *(.iplt)} }"
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