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https://sourceware.org/git/binutils-gdb.git
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0a1b45a20e
* sysdep.h: POISON_BFD_BOOLEAN: Define. * aix5ppc-core.c, * aout-cris.c, * aout-ns32k.c, * aout-target.h, * aoutx.h, * arc-got.h, * archive.c, * archive64.c, * archures.c, * bfd-in.h, * bfd.c, * bfdwin.c, * binary.c, * cache.c, * coff-alpha.c, * coff-arm.c, * coff-arm.h, * coff-bfd.c, * coff-bfd.h, * coff-go32.c, * coff-i386.c, * coff-ia64.c, * coff-mcore.c, * coff-mips.c, * coff-rs6000.c, * coff-sh.c, * coff-stgo32.c, * coff-tic30.c, * coff-tic4x.c, * coff-tic54x.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c, * coff64-rs6000.c, * coffcode.h, * coffgen.c, * cofflink.c, * compress.c, * corefile.c, * cpu-aarch64.c, * cpu-aarch64.h, * cpu-alpha.c, * cpu-arc.c, * cpu-arm.c, * cpu-arm.h, * cpu-avr.c, * cpu-bfin.c, * cpu-bpf.c, * cpu-cr16.c, * cpu-cris.c, * cpu-crx.c, * cpu-csky.c, * cpu-d10v.c, * cpu-d30v.c, * cpu-dlx.c, * cpu-epiphany.c, * cpu-fr30.c, * cpu-frv.c, * cpu-ft32.c, * cpu-h8300.c, * cpu-hppa.c, * cpu-i386.c, * cpu-ia64.c, * cpu-iamcu.c, * cpu-ip2k.c, * cpu-iq2000.c, * cpu-k1om.c, * cpu-l1om.c, * cpu-lm32.c, * cpu-m10200.c, * cpu-m10300.c, * cpu-m32c.c, * cpu-m32r.c, * cpu-m68hc11.c, * cpu-m68hc12.c, * cpu-m68k.c, * cpu-m9s12x.c, * cpu-m9s12xg.c, * cpu-mcore.c, * cpu-mep.c, * cpu-metag.c, * cpu-microblaze.c, * cpu-mips.c, * cpu-mmix.c, * cpu-moxie.c, * cpu-msp430.c, * cpu-mt.c, * cpu-nds32.c, * cpu-nfp.c, * cpu-nios2.c, * cpu-ns32k.c, * cpu-or1k.c, * cpu-pdp11.c, * cpu-pj.c, * cpu-powerpc.c, * cpu-pru.c, * cpu-riscv.c, * cpu-rl78.c, * cpu-rs6000.c, * cpu-rx.c, * cpu-s12z.c, * cpu-s390.c, * cpu-score.c, * cpu-sh.c, * cpu-sparc.c, * cpu-spu.c, * cpu-tic30.c, * cpu-tic4x.c, * cpu-tic54x.c, * cpu-tic6x.c, * cpu-tilegx.c, * cpu-tilepro.c, * cpu-v850.c, * cpu-v850_rh850.c, * cpu-vax.c, * cpu-visium.c, * cpu-wasm32.c, * cpu-xc16x.c, * cpu-xgate.c, * cpu-xstormy16.c, * cpu-xtensa.c, * cpu-z80.c, * cpu-z8k.c, * dwarf1.c, * dwarf2.c, * ecoff-bfd.h, * ecoff.c, * ecofflink.c, * elf-attrs.c, * elf-bfd.h, * elf-eh-frame.c, * elf-hppa.h, * elf-ifunc.c, * elf-m10200.c, * elf-m10300.c, * elf-nacl.c, * elf-nacl.h, * elf-properties.c, * elf-s390-common.c, * elf-s390.h, * elf-strtab.c, * elf-vxworks.c, * elf-vxworks.h, * elf.c, * elf32-am33lin.c, * elf32-arc.c, * elf32-arm.c, * elf32-arm.h, * elf32-avr.c, * elf32-avr.h, * elf32-bfin.c, * elf32-bfin.h, * elf32-cr16.c, * elf32-cr16.h, * elf32-cris.c, * elf32-crx.c, * elf32-csky.c, * elf32-csky.h, * elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c, * elf32-fr30.c, * elf32-frv.c, * elf32-ft32.c, * elf32-gen.c, * elf32-h8300.c, * elf32-hppa.c, * elf32-hppa.h, * elf32-i386.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c, * elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c, * elf32-m68hc1x.c, * elf32-m68hc1x.h, * elf32-m68k.c, * elf32-m68k.h, * elf32-mcore.c, * elf32-mep.c, * elf32-metag.c, * elf32-metag.h, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c, * elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c, * elf32-nios2.h, * elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-ppc.h, * elf32-pru.c, * elf32-rl78.c, * elf32-rx.c, * elf32-s12z.c, * elf32-s390.c, * elf32-score.c, * elf32-score.h, * elf32-score7.c, * elf32-sh-relocs.h, * elf32-sh.c, * elf32-sparc.c, * elf32-spu.c, * elf32-spu.h, * elf32-tic6x.c, * elf32-tic6x.h, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c, * elf32-v850.h, * elf32-vax.c, * elf32-visium.c, * elf32-wasm32.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c, * elf32-xtensa.c, * elf32-z80.c, * elf64-alpha.c, * elf64-bpf.c, * elf64-gen.c, * elf64-hppa.c, * elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-nfp.c, * elf64-ppc.c, * elf64-ppc.h, * elf64-s390.c, * elf64-sparc.c, * elf64-tilegx.c, * elf64-x86-64.c, * elfcode.h, * elfcore.h, * elflink.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c, * elfnn-riscv.c, * elfxx-aarch64.c, * elfxx-aarch64.h, * elfxx-ia64.c, * elfxx-ia64.h, * elfxx-mips.c, * elfxx-mips.h, * elfxx-riscv.c, * elfxx-riscv.h, * elfxx-sparc.c, * elfxx-sparc.h, * elfxx-target.h, * elfxx-tilegx.c, * elfxx-tilegx.h, * elfxx-x86.c, * elfxx-x86.h, * format.c, * genlink.h, * hash.c, * i386aout.c, * i386lynx.c, * i386msdos.c, * ihex.c, * libaout.h, * libbfd-in.h, * libbfd.c, * libcoff-in.h, * libecoff.h, * libpei.h, * libxcoff.h, * linker.c, * mach-o-aarch64.c, * mach-o-arm.c, * mach-o-i386.c, * mach-o-x86-64.c, * mach-o.c, * mach-o.h, * merge.c, * mmo.c, * netbsd.h, * opncls.c, * pc532-mach.c, * pdp11.c, * pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-sh.c, * pe-x86_64.c, * peXXigen.c, * pef.c, * pei-arm.c, * pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-sh.c, * pei-x86_64.c, * peicode.h, * plugin.c, * plugin.h, * ppcboot.c, * reloc.c, * reloc16.c, * rs6000-core.c, * section.c, * simple.c, * som.c, * som.h, * srec.c, * stabs.c, * syms.c, * targets.c, * tekhex.c, * verilog.c, * vms-alpha.c, * vms-lib.c, * vms-misc.c, * vms.h, * wasm-module.c, * xcofflink.c, * xcofflink.h, * xsym.c, * xsym.h: Replace bfd_boolean with bool, FALSE with false, and TRUE with true throughout. * bfd-in2.h: Regenerate. * libbfd.h: Regenerate. * libcoff.h: Regenerate.
200 lines
7.5 KiB
C
200 lines
7.5 KiB
C
/* BFD library support routines for the Renesas / SuperH SH architecture.
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Copyright (C) 1993-2021 Free Software Foundation, Inc.
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Hacked by Steve Chamberlain of Cygnus Support.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#include "sysdep.h"
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#include "bfd.h"
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#include "libbfd.h"
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#include "../opcodes/sh-opc.h"
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#define N(NUMBER, PRINT, DEFAULT, NEXT) \
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{ \
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32, /* Bits in a word. */ \
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32, /* Bits in an address. */ \
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8, /* Bits in a byte. */ \
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bfd_arch_sh, \
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NUMBER, \
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"sh", \
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PRINT, \
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1, /* Section alignment power. */ \
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DEFAULT, \
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bfd_default_compatible, \
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bfd_default_scan, \
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bfd_arch_default_fill, \
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NEXT, \
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0 /* Maximum offset of a reloc from the start of an insn. */ \
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}
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static const bfd_arch_info_type arch_info_struct[] =
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{
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N (bfd_mach_sh2, "sh2", false, arch_info_struct + 1),
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N (bfd_mach_sh2e, "sh2e", false, arch_info_struct + 2),
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N (bfd_mach_sh_dsp, "sh-dsp", false, arch_info_struct + 3),
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N (bfd_mach_sh3, "sh3", false, arch_info_struct + 4),
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N (bfd_mach_sh3_nommu, "sh3-nommu", false, arch_info_struct + 5),
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N (bfd_mach_sh3_dsp, "sh3-dsp", false, arch_info_struct + 6),
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N (bfd_mach_sh3e, "sh3e", false, arch_info_struct + 7),
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N (bfd_mach_sh4, "sh4", false, arch_info_struct + 8),
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N (bfd_mach_sh4a, "sh4a", false, arch_info_struct + 9),
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N (bfd_mach_sh4al_dsp, "sh4al-dsp", false, arch_info_struct + 10),
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N (bfd_mach_sh4_nofpu, "sh4-nofpu", false, arch_info_struct + 11),
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N (bfd_mach_sh4_nommu_nofpu, "sh4-nommu-nofpu", false, arch_info_struct + 12),
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N (bfd_mach_sh4a_nofpu, "sh4a-nofpu", false, arch_info_struct + 13),
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N (bfd_mach_sh2a, "sh2a", false, arch_info_struct + 14),
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N (bfd_mach_sh2a_nofpu, "sh2a-nofpu", false, arch_info_struct + 15),
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N (bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, "sh2a-nofpu-or-sh4-nommu-nofpu", false, arch_info_struct + 16),
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N (bfd_mach_sh2a_nofpu_or_sh3_nommu, "sh2a-nofpu-or-sh3-nommu", false, arch_info_struct + 17),
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N (bfd_mach_sh2a_or_sh4, "sh2a-or-sh4", false, arch_info_struct + 18),
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N (bfd_mach_sh2a_or_sh3e, "sh2a-or-sh3e", false, NULL)
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};
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const bfd_arch_info_type bfd_sh_arch =
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N (bfd_mach_sh, "sh", true, arch_info_struct + 0);
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/* This table defines the mappings from the BFD internal numbering
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system to the opcodes internal flags system.
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It is used by the functions defined below.
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The prototypes for these SH specific functions are found in
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sh-opc.h . */
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static struct { unsigned long bfd_mach, arch, arch_up; } bfd_to_arch_table[] =
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{
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{ bfd_mach_sh, arch_sh1, arch_sh_up },
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{ bfd_mach_sh2, arch_sh2, arch_sh2_up },
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{ bfd_mach_sh2e, arch_sh2e, arch_sh2e_up },
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{ bfd_mach_sh_dsp, arch_sh_dsp, arch_sh_dsp_up },
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{ bfd_mach_sh2a, arch_sh2a, arch_sh2a_up },
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{ bfd_mach_sh2a_nofpu, arch_sh2a_nofpu, arch_sh2a_nofpu_up },
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{ bfd_mach_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu, arch_sh2a_nofpu_or_sh4_nommu_nofpu_up },
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{ bfd_mach_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu, arch_sh2a_nofpu_or_sh3_nommu_up },
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{ bfd_mach_sh2a_or_sh4, arch_sh2a_or_sh4, arch_sh2a_or_sh4_up },
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{ bfd_mach_sh2a_or_sh3e, arch_sh2a_or_sh3e, arch_sh2a_or_sh3e_up },
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{ bfd_mach_sh3, arch_sh3, arch_sh3_up },
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{ bfd_mach_sh3_nommu, arch_sh3_nommu, arch_sh3_nommu_up },
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{ bfd_mach_sh3_dsp, arch_sh3_dsp, arch_sh3_dsp_up },
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{ bfd_mach_sh3e, arch_sh3e, arch_sh3e_up },
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{ bfd_mach_sh4, arch_sh4, arch_sh4_up },
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{ bfd_mach_sh4a, arch_sh4a, arch_sh4a_up },
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{ bfd_mach_sh4al_dsp, arch_sh4al_dsp, arch_sh4al_dsp_up },
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{ bfd_mach_sh4_nofpu, arch_sh4_nofpu, arch_sh4_nofpu_up },
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{ bfd_mach_sh4_nommu_nofpu, arch_sh4_nommu_nofpu, arch_sh4_nommu_nofpu_up },
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{ bfd_mach_sh4a_nofpu, arch_sh4a_nofpu, arch_sh4a_nofpu_up },
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{ 0, 0, 0 } /* Terminator. */
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};
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/* Convert a BFD mach number into the right opcodes arch flags
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using the table above. */
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unsigned int
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sh_get_arch_from_bfd_mach (unsigned long mach)
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{
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int i = 0;
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while (bfd_to_arch_table[i].bfd_mach != 0)
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if (bfd_to_arch_table[i].bfd_mach == mach)
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return bfd_to_arch_table[i].arch;
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else
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i++;
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/* Machine not found. */
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BFD_FAIL();
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return SH_ARCH_UNKNOWN_ARCH;
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}
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/* Convert a BFD mach number into a set of opcodes arch flags
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describing all the compatible architectures (i.e. arch_up)
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using the table above. */
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unsigned int
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sh_get_arch_up_from_bfd_mach (unsigned long mach)
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{
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int i = 0;
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while (bfd_to_arch_table[i].bfd_mach != 0)
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if (bfd_to_arch_table[i].bfd_mach == mach)
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return bfd_to_arch_table[i].arch_up;
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else
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i++;
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/* Machine not found. */
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BFD_FAIL();
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return SH_ARCH_UNKNOWN_ARCH;
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}
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/* Convert an arbitary arch_set - not necessarily corresponding
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directly to anything in the table above - to the most generic
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architecture which supports all the required features, and
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return the corresponding BFD mach. */
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unsigned long
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sh_get_bfd_mach_from_arch_set (unsigned int arch_set)
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{
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unsigned long result = 0;
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unsigned int best = ~arch_set;
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unsigned int co_mask = ~0;
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int i = 0;
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/* If arch_set permits variants with no coprocessor then do not allow
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the other irrelevant co-processor bits to influence the choice:
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e.g. if dsp is disallowed by arch_set, then the algorithm would
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prefer fpu variants over nofpu variants because they also disallow
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dsp - even though the nofpu would be the most correct choice.
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This assumes that EVERY fpu/dsp variant has a no-coprocessor
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counter-part, or their non-fpu/dsp instructions do not have the
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no co-processor bit set. */
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if (arch_set & arch_sh_no_co)
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co_mask = ~(arch_sh_sp_fpu | arch_sh_dp_fpu | arch_sh_has_dsp);
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while (bfd_to_arch_table[i].bfd_mach != 0)
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{
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unsigned int try = bfd_to_arch_table[i].arch_up & co_mask;
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/* Conceptually: Find the architecture with the least number
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of extra features or, if they have the same number, then
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the greatest number of required features. Disregard
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architectures where the required features alone do
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not describe a valid architecture. */
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if (((try & ~arch_set) < (best & ~arch_set)
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|| ((try & ~arch_set) == (best & ~arch_set)
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&& (~try & arch_set) < (~best & arch_set)))
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&& SH_MERGE_ARCH_SET_VALID (try, arch_set))
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{
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result = bfd_to_arch_table[i].bfd_mach;
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best = try;
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}
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i++;
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}
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/* This might happen if a new variant is added to sh-opc.h
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but no corresponding entry is added to the table above. */
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BFD_ASSERT (result != 0);
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return result;
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}
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