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d1a18c2f83
- PKE memory region registration - basic R/W operations - combined pke[01] -> pke
55 lines
1.5 KiB
C
55 lines
1.5 KiB
C
/* Copyright (C) 1998, Cygnus Solutions
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*/
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#ifndef DMA_H_
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#define DMA_H_
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#include "sim-main.h"
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void dma_attach(SIM_DESC sd);
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#define DMA_REGISTER_WINDOW_START 0x10001000
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#define DMA_D0_CHCR_ADDR 0x10001000
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#define DMA_D0_MADR_ADDR 0x10001010
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#define DMA_D0_QWC_ADDR 0x10001020
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#define DMA_D0_TADR_ADDR 0x10001030
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#define DMA_D0_ASR0_ADDR 0x10001040
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#define DMA_D0_ASR1_ADDR 0x10001050
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#define DMA_D1_CHCR_ADDR 0x10001100
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#define DMA_D1_MADR_ADDR 0x10001110
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#define DMA_D1_QWC_ADDR 0x10001120
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#define DMA_D1_TADR_ADDR 0x10001130
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#define DMA_D1_ASR0_ADDR 0x10001140
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#define DMA_D1_ASR1_ADDR 0x10001150
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#define DMA_D2_CHCR_ADDR 0x10001200
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#define DMA_D2_MADR_ADDR 0x10001210
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#define DMA_D2_QWC_ADDR 0x10001220
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#define DMA_D2_TADR_ADDR 0x10001230
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#define DMA_D2_ASR0_ADDR 0x10001240
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#define DMA_D2_ASR1_ADDR 0x10001250
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#define DMA_D_CTRL 0x10001c00
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#define DMA_D_STAT 0x10001c10
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#define DMA_D_PCR 0x10001c20
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#define DMA_D_SQWC 0x10001c30
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#define DMA_D_RBSR 0x10001c40
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#define DMA_D_RBOR 0x10001c50
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#define DMA_D_STADR 0x10001c60
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#define DMA_REGISTER_WINDOW_END 0x10001c70
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#define DMA_REGISTER_WINDOW_SIZE (DMA_REGISTER_WINDOW_END - DMA_REGISTER_WINDOW_START)
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/* virtual addresses for source-addr tracking */
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#define DMA_CHANNEL0_SRCADDR 0x20000000
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#define DMA_CHANNEL1_SRCADDR 0x20000004
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#define DMA_CHANNEL2_SRCADDR 0x20000008
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#define DMA_CHANNEL0_PKTFLAG 0x20000010
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#define DMA_CHANNEL1_PKTFLAG 0x20000014
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#define DMA_CHANNEL2_PKTFLAG 0x20000018
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#endif
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