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https://sourceware.org/git/binutils-gdb.git
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159afbb761
Only relocation handling for now; relaxation is not implemented yet.
bfd/
* elfnn-riscv.c (riscv_elf_check_relocs): Record GOT reference and
paired relocation for TLSDESC_HI20.
(riscv_elf_adjust_dynamic_symbol): Allocate GOT and reloc slots for
TLSDESC symbols.
(riscv_elf_size_dynamic_sections): Likewise but for local symbols.
(tlsdescoff): New helper to determine static addend for R_TLSDESC.
(riscv_elf_relocate_section): Ignore TLSDESC_CALL reloc for now (it is
relaxation only).
Handle TLSDESC_{LOAD,ADD}_LO12 as paired pcrel relocs.
For TLS GOT slot generation, generalize the logic to handle any
combination of (GD, IE, TLSDESC).
Add TLSDESC Rela generation.
* ld/testsuite/ld-riscv-elf/tls*: Add TLSDESC instruction sequences
next to the existing GD and IE sequences. Update expectations.
18 lines
736 B
Makefile
18 lines
736 B
Makefile
#source: tls.s
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#ld: --shared tmpdir/tlslib.so
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#readelf: -Wr
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Relocation section '.rela.dyn' at offset 0x[0-9a-f]+ contains 7 entries:
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+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLS_DTPMOD64 +0
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLS_TPREL64 +4
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLSDESC +4
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLS_DTPMOD64 +0+ sg1 \+ 0
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLS_DTPREL64 +0+ sg1 \+ 0
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLS_TPREL64 +0+ sg1 \+ 0
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_TLSDESC +0+ sg1 \+ 0
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Relocation section '.rela.plt' at offset 0x[0-9a-f]+ contains 1 entry:
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+Offset +Info +Type +Symbol's Value +Symbol's Name \+ Addend
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[0-9a-f]+ +[0-9a-f]+ R_RISCV_JUMP_SLOT +0+ __tls_get_addr \+ 0
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