binutils-gdb/ld/testsuite/ld-riscv-elf/relax-max-align-gp.d
Jan Beulich f438659a6f RISC-V: move various alias entries
For disassembly to only use spec-mandated aliases, respective non-alias
entries need to come ahead of their alias ones. Since identical
mnemonics need to stay together, whole groups are moved up where
necessary.

This partly reverts 839189bc93 ("RISC-V: re-arrange opcode table for
consistent alias handling"), but then also goes beyond a plain revert.

Reviewed-by: Tsukasa OI <research_trasio@irq.a4lg.com>
Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com>
2023-09-01 12:26:46 +02:00

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1.0 KiB
D

#source: relax-max-align-gp.s
#ld:
#objdump: -d
.*:[ ]+file format .*
Disassembly of section .text:
0+[0-9a-f]+ <_start>:
.*:[ ]+[0-9a-f]+[ ]+addi[ ]+.*<gdata>
.*:[ ]+[0-9a-f]+[ ]+jal[ ]+.*
.*:[ ]+[0-9a-f]+[ ]+j[ ]+.*
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
.*:[ ]+[0-9a-f]+[ ]+nop
0+[0-9a-f]+ <func>:
.*:[ ]+[0-9a-f]+[ ]+ret
[ ]+...