binutils-gdb/ld/testsuite/ld-frv/fdpic-pie-8.d
Alan Modra 8f5e83fb73 More support for ld --hash-style in the ld testsuite
These were discovered when running --hash-style=gnu as default, the
previous batch being --hash-style=both.

	* testsuite/ld-aarch64/ifunc-1-local.d: Run ld with --hash-style=sysv.
	* testsuite/ld-aarch64/ifunc-2-local.d: Likewise.
	* testsuite/ld-aarch64/ifunc-3a.d: Likewise.
	* testsuite/ld-frv/fdpic-pie-1.d: Likewise.
	* testsuite/ld-frv/fdpic-pie-2.d: Likewise.
	* testsuite/ld-frv/fdpic-pie-7.d: Likewise.
	* testsuite/ld-frv/fdpic-pie-8.d: Likewise.
	* testsuite/ld-arm/arm-elf.exp: Add --hash-style=sysv to "Using
	Thumb lib by another lib" test's ld options.
	* testsuite/ld-elf/note-3.l: Match .gnu.hash.
	* testsuite/ld-elf/note-3.t: Add .gnu.hash output section.
2017-08-08 07:22:36 +09:30

72 lines
2.3 KiB
Makefile

#name: FRV uClinux PIC relocs to global symbols with addends, pie linking
#source: fdpic8.s
#objdump: -DR -j .text -j .data -j .got -j .plt
#ld: -pie --hash-style=sysv
.*: file format elf.*frv.*
Disassembly of section \.text:
[0-9a-f ]+<F8>:
[0-9a-f ]+: 80 3c 00 02 call [0-9a-f]+ <GF0\+0x4>
[0-9a-f ]+<GF0>:
[0-9a-f ]+: 80 40 f0 10 addi gr15,16,gr0
[0-9a-f ]+: 80 fc 00 14 setlos 0x14,gr0
[0-9a-f ]+: 80 f4 00 24 setlo 0x24,gr0
[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
[0-9a-f ]+: 80 40 f0 0c addi gr15,12,gr0
[0-9a-f ]+: 80 fc 00 1c setlos 0x1c,gr0
[0-9a-f ]+: 80 f4 00 18 setlo 0x18,gr0
[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
[0-9a-f ]+: 80 40 ff f8 addi gr15,-8,gr0
[0-9a-f ]+: 80 fc ff f0 setlos 0xf+ff0,gr0
[0-9a-f ]+: 80 f4 ff e8 setlo 0xffe8,gr0
[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
[0-9a-f ]+: 80 40 ff e0 addi gr15,-32,gr0
[0-9a-f ]+: 80 fc ff e0 setlos 0xf+fe0,gr0
[0-9a-f ]+: 80 f4 ff e0 setlo 0xffe0,gr0
[0-9a-f ]+: 80 f8 ff ff sethi 0xffff,gr0
[0-9a-f ]+: 80 f4 00 20 setlo 0x20,gr0
[0-9a-f ]+: 80 f8 00 00 sethi hi\(0x0\),gr0
Disassembly of section \.dat[0-9a-f ]+:
[0-9a-f ]+<D8>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.data
[0-9a-f ]+<GD0>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC \.text
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.text
Disassembly of section \.got:
[0-9a-f ]+<.got>:
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_FUNCDESC_VALUE \.text
[0-9a-f ]+: 00 00 00 02 add\.p gr0,fp,gr0
[0-9a-f ]+<_GLOBAL_OFFSET_TABLE_>:
\.\.\.
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC \.text
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.text
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.text
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC \.text
[0-9a-f ]+: 00 00 00 04 add\.p gr0,gr4,gr0
[0-9a-f ]+: R_FRV_FUNCDESC \.text
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.data
[0-9a-f ]+: 00 00 00 08 add\.p gr0,gr8,gr0
[0-9a-f ]+: R_FRV_32 \.text