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https://sourceware.org/git/binutils-gdb.git
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b305015577
Many tests reflect a setting of ELF_MAXPAGESIZE to 64 KiB.
With ELF_MAXPAGESIZE changed to 4 KiB, layout is sometimes
different and symbols end up in other places. Avoid churn
and regexpification of old test patterns by passing the
max-page-size setting active at the time.
ld/testsuite:
* testsuite/ld-arm/arm-elf.exp,
testsuite/ld-arm/non-contiguous-arm2.d,
testsuite/ld-arm/non-contiguous-arm3.d,
testsuite/ld-arm/non-contiguous-arm5.d,
testsuite/ld-arm/non-contiguous-arm6.d,
testsuite/ld-arm/thumb-plt-got.d, testsuite/ld-arm/thumb-plt.d:
Pass -z max-page-size=0x10000 explicitly to test that rely on
that value in output-matching patterns.
78 lines
2.6 KiB
Makefile
78 lines
2.6 KiB
Makefile
#name: non-contiguous-arm6
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#source: non-contiguous-arm.s
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#ld: --enable-non-contiguous-regions -T non-contiguous-arm6.ld -z max-page-size=0x10000
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#objdump: -rdth
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#xfail: [is_generic]
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#skip: arm*nacl
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.*: file format elf32-(little|big)arm
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Sections:
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Idx Name Size VMA LMA File off Algn
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0 \.raml 00000028 1fff0000 1fff0000 00010000 2\*\*3
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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1 \.ramz 00000050 40040000 30000000 00020000 2\*\*2
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CONTENTS, ALLOC, LOAD, READONLY, CODE
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2 .ARM.attributes 00000012 00000000 00000000 00020050 2\*\*0
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CONTENTS, READONLY
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SYMBOL TABLE:
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1fff0000 l d .raml 00000000 .raml
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40040000 l d .ramz 00000000 .ramz
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00000000 l d .ARM.attributes 00000000 .ARM.attributes
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00000000 l df \*ABS\* 00000000 .*non-contiguous-arm.o
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1fff0020 l F .raml 00000008 __code4_veneer
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1fff0028 g .raml 00000000 _raml_end
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30000000 g .raml 00000000 _ramu_start
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1fff000c g F .raml 00000000 code2
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40040000 g .ramz 00000000 _ramz_start
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1fff0000 g .raml 00000000 _raml_start
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1fff0018 g F .raml 00000000 code3
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1fff0000 g F .raml 00000000 code1
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40040050 g .ramz 00000000 _ramz_end
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40040000 g F .ramz 00000000 code4
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30000000 g .raml 00000000 _ramu_end
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Disassembly of section .raml:
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1fff0000 \<code1\>:
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1fff0000: e1a00000 nop @ \(mov r0, r0\)
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1fff0004: e1a00000 nop @ \(mov r0, r0\)
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1fff0008: ebffffff bl 1fff000c \<code2\>
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1fff000c \<code2\>:
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1fff000c: e1a00000 nop @ \(mov r0, r0\)
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1fff0010: e1a00000 nop @ \(mov r0, r0\)
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1fff0014: ebffffff bl 1fff0018 \<code3\>
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1fff0018 \<code3\>:
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1fff0018: e1a00000 nop @ \(mov r0, r0\)
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1fff001c: ebffffff bl 1fff0020 \<__code4_veneer\>
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1fff0020 \<__code4_veneer\>:
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1fff0020: e51ff004 ldr pc, \[pc, #-4\] @ 1fff0024 \<__code4_veneer\+0x4\>
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1fff0024: 40040000 .word 0x40040000
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Disassembly of section .ramz:
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40040000 \<code4\>:
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40040000: e1a00000 .word 0xe1a00000
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40040004: e1a00000 .word 0xe1a00000
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40040008: e1a00000 .word 0xe1a00000
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4004000c: e1a00000 .word 0xe1a00000
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40040010: e1a00000 .word 0xe1a00000
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40040014: e1a00000 .word 0xe1a00000
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40040018: e1a00000 .word 0xe1a00000
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4004001c: e1a00000 .word 0xe1a00000
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40040020: e1a00000 .word 0xe1a00000
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40040024: e1a00000 .word 0xe1a00000
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40040028: e1a00000 .word 0xe1a00000
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4004002c: e1a00000 .word 0xe1a00000
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40040030: e1a00000 .word 0xe1a00000
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40040034: e1a00000 .word 0xe1a00000
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40040038: e1a00000 .word 0xe1a00000
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4004003c: e1a00000 .word 0xe1a00000
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40040040: e1a00000 .word 0xe1a00000
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40040044: e1a00000 .word 0xe1a00000
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40040048: e1a00000 .word 0xe1a00000
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4004004c: e1a00000 .word 0xe1a00000
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