Andrew Burgess 6a7f57668a riscv: print .2byte or .4byte before an unknown instruction encoding ... When the RISC-V disassembler encounters an unknown instruction, it currently just prints the value of the bytes, like this: Dump of assembler code for function custom_insn: 0x00010132 <+0>: addi sp,sp,-16 0x00010134 <+2>: sw s0,12(sp) 0x00010136 <+4>: addi s0,sp,16 0x00010138 <+6>: 0x52018b 0x0001013c <+10>: 0x9c45 My proposal, in this patch, is to change the behaviour to this: Dump of assembler code for function custom_insn: 0x00010132 <+0>: addi sp,sp,-16 0x00010134 <+2>: sw s0,12(sp) 0x00010136 <+4>: addi s0,sp,16 0x00010138 <+6>: .4byte 0x52018b 0x0001013c <+10>: .2byte 0x9c45 Adding the .4byte and .2byte opcodes. The benefit that I see here is that in the patched version of the tools, the disassembler output can be fed back into the assembler and it should assemble to the same binary format. Before the patch, the disassembler output is invalid assembly. I've started a RISC-V specific test file under binutils so that I can add a test for this change. binutils/ChangeLog: * testsuite/binutils-all/riscv/riscv.exp: New file. * testsuite/binutils-all/riscv/unknown.d: New file. * testsuite/binutils-all/riscv/unknown.s: New file. opcodes/ChangeLog: * riscv-dis.c (riscv_disassemble_insn): Print a .%dbyte opcode before an unknown instruction, '%d' is replaced with the instruction length.		2021-09-20 09:45:34 +01:00
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binutils-all	riscv: print .2byte or .4byte before an unknown instruction encoding	2021-09-20 09:45:34 +01:00
config	Update year range in copyright notice of binutils files	2021-01-01 10:31:05 +10:30
lib	CC_FOR_TARGET et al	2021-09-03 16:26:09 +09:30
ChangeLog-0411
ChangeLog-1215
ChangeLog-9303
gentestdlls.c	Update year range in copyright notice of binutils files	2021-01-01 10:31:05 +10:30