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* *Modified Files: * .Sanitize ChangeLog *Added Files: * Makefile.in README.Cygnus config.in configure configure.in * device.c device.h dma.c dma.h engine-sky.c gencode.c gpuif.c * gpuif.h hardware.c hardware.h interp.c m16.igen mdmx.igen * mips.dc mips.igen pke0.c pke0.h pke1.c pke1.h r5900.igen * sim-main.h tconfig.in vr5400.igen vu0.c vu0.h vu1.c vu1.h
39 lines
1.6 KiB
Plaintext
39 lines
1.6 KiB
Plaintext
> README.Cygnus
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-------------------------------------------------------------------------------
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The following are the main reasons for constructing the simulator as a
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generator:
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1) Avoid large fixed decode source file, with lots of #ifs controlling
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the compilation. i.e. keep the source cleaner, smaller and easier
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to parse.
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2) Allow optimum code to be created, without run-time checks on
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instruction types. Ensure that the simulator engine only includes
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code for the architecture being targetted. e.g. This avoids
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run-time checks on ISA conformance, aswell as increasing
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throughput.
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3) Allow updates to the instruction sets to be added quickly. Having a
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table means that the information is together, and is easier to
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manipulate. Having the table generate the engine, rather than the
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run-time parse the table gives higher performance at simulation
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time.
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4) Keep all the similar simulation code together. i.e. have a single
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place where, for example, the addition code is held. This ensures that
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updates to the simulation are not spread over a large flat source
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file maintained by the developer.
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-------------------------------------------------------------------------------
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To keep the simulator simple (and to avoid the slight chance of
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mis-matched files) the manifests describing an engine, and the
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simulator engine itself, are held in the same source file.
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This means that the engine must be included twice, with the first pass
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controlled by the SIM_MANIFESTS definition.
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-------------------------------------------------------------------------------
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> EOF README.Cygnus
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