Jan Beulich 8ee52bcf39 x86: widen applicability and use of CheckRegSize ... First of all make operand_type_register_match() apply to all sized operands, i.e. in Intel Syntax also to respective memory ones. This addresses gas wrongly accepting certain SIMD insns where register and memory operand sizes should match but don't. This apparently has affected all templates with one memory-only operand and one or more register ones, both permitting at least two sizes, due to CheckRegSize not taking effect. Then also add CheckRegSize to a couple of non-SIMD templates matching that same pattern of memory-only vs register operands. This replaces bogus (for Intel Syntax) diagnostics referring to a wrong suffix (when none was used at all) by "type mismatch" ones, just like already emitted for insns where the template allows a register operand alongside a memory one at any particular position. This also is a prereq to limiting (ideally eliminating in the long run) suffix "derivation" in Intel Syntax mode. While making the code adjustment also flip order of checks to do the cheaper one first in both cases.		2022-11-24 09:35:51 +01:00
..
po	Updated Romainain translation for the binutils sub-directory and Swedish translations for the ld and opcodes sub-directories.	2022-10-31 14:42:47 +00:00
.gitignore
aarch64-asm-2.c	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aarch64-asm.c	Allow explicit size specifier for predicate operand of {sq, uq, }{incp, decp}	2022-10-17 10:21:39 +01:00
aarch64-asm.h
aarch64-dis-2.c	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aarch64-dis.c
aarch64-dis.h
aarch64-gen.c
aarch64-opc-2.c	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aarch64-opc.c	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aarch64-opc.h	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aarch64-tbl.h	aarch64: Add support for Common Short Sequence Compression extension	2022-11-14 16:47:22 +00:00
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c
arc-dis.h
arc-ext-tbl.h
arc-ext.c
arc-ext.h
arc-fxi.h
arc-nps400-tbl.h
arc-opc.c
arc-regs.h	opcodes: Correct address for ARC's "isa_config" aux reg	2022-11-22 12:59:32 +01:00
arc-tbl.h
arm-dis.c	[opcodes/arm] Fix potential null pointer dereferences	2022-11-10 01:12:17 +00:00
avr-dis.c
bfin-dis.c
bpf-asm.c
bpf-desc.c
bpf-desc.h
bpf-dis.c
bpf-ibld.c
bpf-opc.c
bpf-opc.h
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c
cgen-dis.in
cgen-ibld.in
cgen-opc.c
cgen.sh
ChangeLog	opcodes: Correct address for ARC's "isa_config" aux reg	2022-11-22 12:59:32 +01:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-2015
ChangeLog-2016
ChangeLog-2017
ChangeLog-2018
ChangeLog-2019
ChangeLog-2020
ChangeLog-9297
ChangeLog-9899
config.in
configure
configure.ac
configure.com
cr16-dis.c
cr16-opc.c
cris-desc.c
cris-desc.h
cris-dis.c
cris-opc.c
cris-opc.h
crx-dis.c
crx-opc.c
csky-dis.c
csky-opc.h
d10v-dis.c
d10v-opc.c
d30v-dis.c
d30v-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c	opcodes/arm: add disassembler styling for arm	2022-11-01 09:32:13 +00:00
disassemble.h
dlx-dis.c
epiphany-asm.c
epiphany-desc.c
epiphany-desc.h
epiphany-dis.c
epiphany-ibld.c
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c
fr30-desc.h
fr30-dis.c
fr30-ibld.c
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c
frv-desc.h
frv-dis.c
frv-ibld.c
frv-opc.c
frv-opc.h
ft32-dis.c
ft32-opc.c
h8300-dis.c
hppa-dis.c
i386-dis-evex-len.h	x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns	2022-10-24 09:30:58 +02:00
i386-dis-evex-mod.h
i386-dis-evex-prefix.h	x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns	2022-10-24 09:30:58 +02:00
i386-dis-evex-reg.h	x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns	2022-10-24 09:30:58 +02:00
i386-dis-evex-w.h	x86: emit {evex} prefix when disassembling ambiguous AVX512VL insns	2022-10-24 09:30:58 +02:00
i386-dis-evex.h	Support Intel AVX-IFMA	2022-11-02 09:19:20 +08:00
i386-dis.c	x86: correct handling of LAR and LSL	2022-11-24 09:34:52 +01:00
i386-gen.c	Add AMD znver4 processor support	2022-11-15 10:07:02 -08:00
i386-init.h	Add AMD znver4 processor support	2022-11-15 10:07:02 -08:00
i386-opc.c	i386: Move i386_seg_prefixes to gas	2022-11-17 09:06:10 -08:00
i386-opc.h	i386: Move i386_seg_prefixes to gas	2022-11-17 09:06:10 -08:00
i386-opc.tbl	x86: widen applicability and use of CheckRegSize	2022-11-24 09:35:51 +01:00
i386-reg.tbl
i386-tbl.h	x86: widen applicability and use of CheckRegSize	2022-11-24 09:35:51 +01:00
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c
ip2k-desc.h
ip2k-dis.c
ip2k-ibld.c
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c
iq2000-desc.h
iq2000-dis.c
iq2000-ibld.c
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c
lm32-desc.h
lm32-dis.c
lm32-ibld.c
lm32-opc.c
lm32-opc.h
lm32-opinst.c
loongarch-coder.c
loongarch-dis.c
loongarch-opc.c
m32c-asm.c
m32c-desc.c
m32c-desc.h
m32c-dis.c
m32c-ibld.c
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c
m32r-desc.h
m32r-dis.c
m32r-ibld.c
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c
m68k-opc.c	PR16995, m68k coldfire emac immediate to macsr incorrect disassembly	2022-11-24 17:45:52 +10:30
m10200-dis.c
m10200-opc.c
m10300-dis.c
m10300-opc.c
MAINTAINERS
Makefile.am
Makefile.in
makefile.vms
mcore-dis.c
mcore-opc.h
mep-asm.c
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
metag-dis.c
microblaze-dis.c
microblaze-dis.h
microblaze-opc.h
microblaze-opcm.h
micromips-opc.c
mips16-opc.c
mips-dis.c
mips-formats.h
mips-opc.c
mmix-dis.c
mmix-opc.c
moxie-dis.c
moxie-opc.c
msp430-decode.c
msp430-decode.opc
msp430-dis.c	Update year range in copyright notice of binutils files	2022-01-02 12:04:28 +10:30
mt-asm.c
mt-desc.c
mt-desc.h
mt-dis.c
mt-ibld.c
mt-opc.c
mt-opc.h
nds32-asm.c
nds32-asm.h
nds32-dis.c
nds32-opc.h
nfp-dis.c
nios2-dis.c
nios2-opc.c
ns32k-dis.c
opc2c.c
opintl.h
or1k-asm.c
or1k-desc.c
or1k-desc.h
or1k-dis.c
or1k-ibld.c
or1k-opc.c
or1k-opc.h
or1k-opinst.c
pdp11-dis.c
pdp11-opc.c
pj-dis.c
pj-opc.c
ppc-dis.c	PowerPC: Add support for RFC02653 - Dense Math Facility	2022-10-27 19:23:00 -05:00
ppc-opc.c	PowerPC64 paddi -Mraw	2022-11-12 17:27:24 +10:30
pru-dis.c
pru-opc.c
riscv-dis.c	RISC-V: Output mapping symbols with ISA string.	2022-10-28 11:11:23 +08:00
riscv-opc.c	RISC-V: Add T-Head Int vendor extension	2022-11-17 16:43:55 +08:00
rl78-decode.c
rl78-decode.opc	Update year range in copyright notice of binutils files	2022-01-02 12:04:28 +10:30
rl78-dis.c
rx-decode.c	RX assembler: switch arguments of thw MVTACGU insn.	2022-10-31 10:46:37 +00:00
rx-decode.opc	RX assembler: switch arguments of thw MVTACGU insn.	2022-10-31 10:46:37 +00:00
rx-dis.c
s12z-dis.c
s12z-opc.c
s12z-opc.h
s390-dis.c
s390-mkopc.c
s390-opc.c
s390-opc.txt
score7-dis.c
score-dis.c
score-opc.h
sh-dis.c
sh-opc.h
sparc-dis.c
sparc-opc.c
spu-dis.c
spu-opc.c
sysdep.h
tic4x-dis.c
tic6x-dis.c
tic30-dis.c
tic54x-dis.c
tic54x-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c
v850-opc.c
vax-dis.c
visium-dis.c
visium-opc.c
wasm32-dis.c
xgate-dis.c
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c
xstormy16-desc.h
xstormy16-dis.c
xstormy16-ibld.c
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c
z8k-dis.c
z8k-opc.h
z8kgen.c
z80-dis.c