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a63375ac33
This is the Hypervisor Extension 1.0 - Hypervisor Memory-Management Instructions HFENCE.VVMA, HFENCE.GVMA, - Hypervisor Virtual Machine Load and Store Instructions HLV.B, HLV.BU, HSV.B, HLV.H, HLV.HU, HLVX.HU, HSB.H, HLV.W, HLV.WU, HLVX.WU, HSV.W, HLV.D, HSV.D - Hypervisor CSRs (some new, some address changed) hstatus, hedeleg, hideleg, hie, hcounteren, hgeie, htval, hip, hvip, htinst, hgeip, henvcfg, henvcfgh, hgatp, hcontext, htimedelta, htimedeltah, vsstatus, vsie, vstvec, vsscratch, vsepc, vscause, vstval, vsip, vsatp, Note that following were added already as part of svinval extension support: HINVAL.GVMA, HINVAL.VVMA Signed-off-by: Vineet Gupta <vineetg@rivosinc.com> Reviewed-by: Palmer Dabbelt <palmer@rivosinc.com> Reviewed-by: Nelson Chu <nelson.chu@sifive.com> bfd/ * cpu-riscv.c (riscv_priv_specs): Added entry for 1.12. * cpu-riscv.h (enum riscv_spec_class): Added PRIV_SPEC_CLASS_1P12. gas/ * config/tc-riscv.c (abort_version): Updated comment. (validate_riscv_insn): Annotate switch-break. * testsuite/gas/riscv/h-ext-32.d: New testcase for hypervisor. * testsuite/gas/riscv/h-ext-32.s: Likewise. * testsuite/gas/riscv/h-ext-64.d: Likewise. * testsuite/gas/riscv/h-ext-64.s: Likewise. include/ * opcode/riscv-opc.h: Added encodings for hypervisor csrs and instrcutions. opcodes/ * riscv-opc.c (riscv_opcodes): Added hypervisor instrcutions.
86 lines
2.6 KiB
C
86 lines
2.6 KiB
C
/* RISC-V spec version controlling support.
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Copyright (C) 2019-2020 Free Software Foundation, Inc.
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This file is part of BFD, the Binary File Descriptor library.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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enum riscv_spec_class
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{
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/* ISA spec. */
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ISA_SPEC_CLASS_NONE = 0,
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ISA_SPEC_CLASS_2P2,
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ISA_SPEC_CLASS_20190608,
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ISA_SPEC_CLASS_20191213,
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ISA_SPEC_CLASS_DRAFT,
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/* Privileged spec. */
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PRIV_SPEC_CLASS_NONE,
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PRIV_SPEC_CLASS_1P9P1,
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PRIV_SPEC_CLASS_1P10,
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PRIV_SPEC_CLASS_1P11,
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PRIV_SPEC_CLASS_1P12,
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PRIV_SPEC_CLASS_DRAFT,
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};
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struct riscv_spec
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{
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const char *name;
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enum riscv_spec_class spec_class;
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};
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extern const struct riscv_spec riscv_isa_specs[];
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extern const struct riscv_spec riscv_priv_specs[];
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#define RISCV_GET_SPEC_CLASS(UTYPE, LTYPE, NAME, CLASS) \
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do \
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{ \
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if (NAME == NULL) \
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break; \
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\
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int i_spec = UTYPE##_SPEC_CLASS_NONE + 1; \
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for (; i_spec < UTYPE##_SPEC_CLASS_DRAFT; i_spec++) \
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{ \
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int j_spec = i_spec - UTYPE##_SPEC_CLASS_NONE -1; \
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if (riscv_##LTYPE##_specs[j_spec].name \
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&& strcmp (riscv_##LTYPE##_specs[j_spec].name, NAME) == 0)\
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{ \
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CLASS = riscv_##LTYPE##_specs[j_spec].spec_class; \
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break; \
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} \
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} \
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} \
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while (0)
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#define RISCV_GET_SPEC_NAME(UTYPE, LTYPE, NAME, CLASS) \
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(NAME) = riscv_##LTYPE##_specs[(CLASS) - UTYPE##_SPEC_CLASS_NONE - 1].name
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#define RISCV_GET_ISA_SPEC_CLASS(NAME, CLASS) \
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RISCV_GET_SPEC_CLASS(ISA, isa, NAME, CLASS)
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#define RISCV_GET_PRIV_SPEC_CLASS(NAME, CLASS) \
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RISCV_GET_SPEC_CLASS(PRIV, priv, NAME, CLASS)
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#define RISCV_GET_PRIV_SPEC_NAME(NAME, CLASS) \
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RISCV_GET_SPEC_NAME(PRIV, priv, NAME, CLASS)
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extern void
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riscv_get_priv_spec_class_from_numbers (unsigned int,
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unsigned int,
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unsigned int,
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enum riscv_spec_class *);
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extern bool
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riscv_elf_is_mapping_symbols (const char *);
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