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252dcdf432
ppc64 ld optimises sequences like the following addis 3,13,wot@tprel@ha lwz 3,wot@tprel@l(3) to nop lwz 3,wot@tprel(13) when "wot" is located near enough to the thread pointer. However, the ABI doesn't require that R_PPC64_TPREL16_HA always be on an addis rt,13,imm instruction, and while ld checked for that on the high-part instruction it didn't disable the optimisation on the low-part instruction. This patch fixes that problem, disabling the tprel optimisation globally if high-part instructions don't pass sanity checks. The optimisation is also enabled for ppc32, where before ld.bfd had the code in the wrong place and ld.gold had it in a block only enabled for ppc64. bfd/ * elf32-ppc.c (ppc_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc_elf_relocate_section): Move TPREL16_HA/LO optimisation later. Don't sanity check them here. * elf64-ppc.c (ppc64_elf_check_relocs): Set has_tls_reloc for high part tprel16 relocs. (ppc64_elf_tls_optimize): Sanity check high part tprel16 relocs. Clear do_tls_opt on odd instructions. (ppc64_elf_relocate_section): Don't sanity check TPREL16_HA. ld/ * testsuite/ld-powerpc/tls32.d: Update for TPREL_HA/LO optimisation. * testsuite/ld-powerpc/tlsexe32.d: Likewise. * testsuite/ld-powerpc/tlsldopt32.d: Likewise. * testsuite/ld-powerpc/tlsmark32.d: Likewise. * testsuite/ld-powerpc/tlsopt4_32.d: Likewise. * testsuite/ld-powerpc/tprel.s, * testsuite/ld-powerpc/tprel.d, * testsuite/ld-powerpc/tprel32.d: New tests. * testsuite/ld-powerpc/tprelbad.s, * testsuite/ld-powerpc/tprelbad.d: New test. * testsuite/ld-powerpc/powerpc.exp: Run them. gold/ * powerpc.cc (Target_powerpc): Add tprel_opt_ and accessors. (Target_powerpc::Scan::local): Sanity check tprel high relocs. (Target_powerpc::Scan::global): Likewise. (Target_powerpc::Relocate::relocate): Control tprel optimisation with tprel_opt_ and enable for 32-bit.
45 lines
1.1 KiB
Makefile
45 lines
1.1 KiB
Makefile
#source: tlsopt4_32.s
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#source: tlslib32.s
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#as: -a32
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#ld:
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#objdump: -dr
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#target: powerpc*-*-*
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.*
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Disassembly of section \.text:
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0+1800094 <__tls_get_addr>:
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.*: (4e 80 00 20|20 00 80 4e) blr
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Disassembly of section \.opt1:
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0+1800098 <\.opt1>:
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
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.*: (41 82 00 0c|0c 00 82 41) beq .*
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.*: (38 62 90 10|10 90 62 38) addi r3,r2,-28656
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.*: (48 00 00 08|08 00 00 48) b .*
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.*: (38 62 90 10|10 90 62 38) addi r3,r2,-28656
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Disassembly of section \.opt2:
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0+18000b0 <\.opt2>:
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (2c 04 00 00|00 00 04 2c) cmpwi r4,0
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.*: (41 82 00 08|08 00 82 41) beq .*
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (38 62 90 10|10 90 62 38) addi r3,r2,-28656
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Disassembly of section \.opt3:
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0+18000c4 <\.opt3>:
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (48 00 00 0c|0c 00 00 48) b .*
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.*: (60 00 00 00|00 00 00 60) nop
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.*: (48 00 00 0c|0c 00 00 48) b .*
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.*: (38 62 90 10|10 90 62 38) addi r3,r2,-28656
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.*: (48 00 00 08|08 00 00 48) b .*
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.*: (38 62 90 08|08 90 62 38) addi r3,r2,-28664
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#pass
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