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https://sourceware.org/git/binutils-gdb.git
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4bd7c90276
PowerPC version of git commit d1bcae833b.
bfd/
* elf32-ppc.c: Delete outdated comment.
(TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
* elf64-ppc.c (TARGET_KEEP_UNUSED_SECTION_SYMBOLS): Define.
gas/
* testsuite/gas/ppc/power4.d: Adjust for removal of section sym.
* testsuite/gas/ppc/test1elf32.d: Likewise.
* testsuite/gas/ppc/test1elf64.d: Likewise.
ld/
* testsuite/ld-powerpc/relbrlt.s: Make symbols global.
* testsuite/ld-powerpc/relbrlt.d: Adjust to suit.
* testsuite/ld-powerpc/tlsget.d: Adjust for reordered stubs.
* testsuite/ld-powerpc/tlsget.wf: Likewise.
* testsuite/ld-powerpc/tlsget2.d: Likewise.
* testsuite/ld-powerpc/tlsget2.wf: Likewise.
* testsuite/ld-powerpc/tlsexe.r: Adjust for removed section syms.
* testsuite/ld-powerpc/tlsexe32.r: Likewise.
* testsuite/ld-powerpc/tlsexe32no.r: Likewise.
* testsuite/ld-powerpc/tlsexeno.r: Likewise.
* testsuite/ld-powerpc/tlsexenors.r: Likewise.
* testsuite/ld-powerpc/tlsexers.r: Likewise.
* testsuite/ld-powerpc/tlsexetoc.r: Likewise.
* testsuite/ld-powerpc/tlsexetocrs.r: Likewise.
* testsuite/ld-powerpc/tlsso.r: Likewise.
* testsuite/ld-powerpc/tlsso32.r: Likewise.
* testsuite/ld-powerpc/tlstocso.r: Likewise.
61 lines
1.8 KiB
Makefile
61 lines
1.8 KiB
Makefile
#source: relbrlt.s
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#as: -a64
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#ld: -melf64ppc --no-plt-align --no-ld-generated-unwind-info --emit-relocs
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#objdump: -Dr
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.*
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Disassembly of section \.text:
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0*100000c0 <_start>:
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[0-9a-f ]*: (49 bf 00 39|39 00 bf 49) bl .*
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[0-9a-f ]*: R_PPC64_REL24 far
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[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
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[0-9a-f ]*: (49 bf 00 25|25 00 bf 49) bl .*
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[0-9a-f ]*: R_PPC64_REL24 far2far
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[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
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[0-9a-f ]*: (49 bf 00 11|11 00 bf 49) bl .*
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[0-9a-f ]*: R_PPC64_REL24 huge
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[0-9a-f ]*: (60 00 00 00|00 00 00 60) nop
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[0-9a-f ]*: 00 00 00 00 \.long 0x0
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[0-9a-f ]*: (4b ff ff e4|e4 ff ff 4b) b .* <_start>
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\.\.\.
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[0-9a-f ]*<.*plt_branch.*>:
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[0-9a-f ]*: (e9 82 80 f8|f8 80 82 e9) ld r12,-32520\(r2\)
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f00f8
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[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
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[0-9a-f ]*<.*plt_branch.*>:
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[0-9a-f ]*: (e9 82 81 00|00 81 82 e9) ld r12,-32512\(r2\)
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[0-9a-f ]*: R_PPC64_TOC16_DS \*ABS\*\+0x157f0100
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[0-9a-f ]*: (7d 89 03 a6|a6 03 89 7d) mtctr r12
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[0-9a-f ]*: (4e 80 04 20|20 04 80 4e) bctr
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[0-9a-f ]*<.*long_branch.*>:
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[0-9a-f ]*: (49 bf 00 04|04 00 bf 49) b .* <far>
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[0-9a-f ]*: R_PPC64_REL24 far
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\.\.\.
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0*137e00fc <far>:
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[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
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\.\.\.
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0*13bf00f0 <far2far>:
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[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
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\.\.\.
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0*157e00f4 <huge>:
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[0-9a-f ]*: (4e 80 00 20|20 00 80 4e) blr
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Disassembly of section \.branch_lt:
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0*157f00f8 .*:
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[0-9a-f ]*: (00 00 00 00|f4 00 7e 15) .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x157e00f4
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[0-9a-f ]*: (15 7e 00 f4|00 00 00 00) .*
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[0-9a-f ]*: (00 00 00 00|f0 00 bf 13) .*
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[0-9a-f ]*: R_PPC64_RELATIVE \*ABS\*\+0x13bf00f0
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[0-9a-f ]*: (13 bf 00 f0|00 00 00 00) .*
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