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https://sourceware.org/git/binutils-gdb.git
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6a2619f953
With this change all gas and most ld tests pass when configured for arm-linux. It doesn't look like these configurations have been tested in a long time but this attempts to stem the bit-rot slightly. gas/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * gas/arm/bl-local-2.d: Only enable the test on EABI and NaCl configurations. * gas/arm/bl-local-v4t.d: Likewise. * gas/arm/blx-local.d: Likewise. * gas/arm/branch-reloc.d: Likewise. ld/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix tests, IFUNC tests and other EABI requiring tests to... (armeabitests_nonacl): ...here. * ld-arm/arm-app-abs32.d: Loosen regex for architecture type to allow test to pass on configurations without an attributes section. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-static-app.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-far.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-descrelax-be32.d: Likewise. * ld-arm/tls-descrelax.d: Likewise. * ld-arm/tls-descseq.d: Likewise. * ld-arm/tls-gdesc-got.d: Likewise. * ld-arm/tls-gdesc.d: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-thumb1.d: Likewise.
109 lines
4.3 KiB
Makefile
109 lines
4.3 KiB
Makefile
.*: file format elf32-.*
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architecture: arm.*, flags 0x[0-9a-f]+:
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EXEC_P, HAS_SYMS, D_PAGED
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start address 0x[0-9a-f]+
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Disassembly of section .text:
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00008000 <foo>:
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8000: e59f0004 ldr r0, \[pc, #4\] ; 800c <foo\+0xc>
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8004: e79f0000 ldr r0, \[pc, r0\]
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8008: e1a00000 nop ; \(mov r0, r0\)
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800c: 00008138 .word 0x00008138
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8010: e59f0004 ldr r0, \[pc, #4\] ; 801c <foo\+0x1c>
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8014: e79f0000 ldr r0, \[pc, r0\]
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8018: e1a00000 nop ; \(mov r0, r0\)
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801c: 00008128 .word 0x00008128
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8020: e59f0004 ldr r0, \[pc, #4\] ; 802c <foo\+0x2c>
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8024: e1a00000 nop ; \(mov r0, r0\)
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8028: e1a00000 nop ; \(mov r0, r0\)
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802c: 0000000c .word 0x0000000c
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8030: e59f0004 ldr r0, \[pc, #4\] ; 803c <foo\+0x3c>
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8034: e1a00000 nop ; \(mov r0, r0\)
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8038: e1a00000 nop ; \(mov r0, r0\)
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803c: 0000000c .word 0x0000000c
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8040: e59f000c ldr r0, \[pc, #12\] ; 8054 <foo\+0x54>
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8044: e08f0000 add r0, pc, r0
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8048: e5901000 ldr r1, \[r0\]
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804c: e1a00001 mov r0, r1
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8050: e1a00000 nop ; \(mov r0, r0\)
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8054: 000080f8 .word 0x000080f8
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8058: e59f000c ldr r0, \[pc, #12\] ; 806c <foo\+0x6c>
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805c: e08f0000 add r0, pc, r0
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8060: e5901000 ldr r1, \[r0\]
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8064: e1a00001 mov r0, r1
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8068: e1a00000 nop ; \(mov r0, r0\)
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806c: 000080e0 .word 0x000080e0
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8070: e59f000c ldr r0, \[pc, #12\] ; 8084 <foo\+0x84>
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8074: e1a00000 nop ; \(mov r0, r0\)
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8078: e1a00000 nop ; \(mov r0, r0\)
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807c: e1a00000 nop ; \(mov r0, r0\)
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8080: e1a00000 nop ; \(mov r0, r0\)
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8084: 0000000c .word 0x0000000c
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8088: e59f000c ldr r0, \[pc, #12\] ; 809c <foo\+0x9c>
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808c: e1a00000 nop ; \(mov r0, r0\)
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8090: e1a00000 nop ; \(mov r0, r0\)
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8094: e1a00000 nop ; \(mov r0, r0\)
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8098: e1a00000 nop ; \(mov r0, r0\)
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809c: 0000000c .word 0x0000000c
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000080a0 <bar>:
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80a0: 4801 ldr r0, \[pc, #4\] ; \(80a8 <bar\+0x8>\)
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80a2: 4478 add r0, pc
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80a4: 6800 ldr r0, \[r0, #0\]
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80a6: 46c0 nop ; \(mov r8, r8\)
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80a8: 0000809e .word 0x0000809e
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80ac: 4801 ldr r0, \[pc, #4\] ; \(80b4 <bar\+0x14>\)
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80ae: 4478 add r0, pc
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80b0: 6800 ldr r0, \[r0, #0\]
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80b2: 46c0 nop ; \(mov r8, r8\)
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80b4: 00008092 .word 0x00008092
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80b8: 4801 ldr r0, \[pc, #4\] ; \(80c0 <bar\+0x20>\)
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80ba: 4478 add r0, pc
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80bc: 6800 ldr r0, \[r0, #0\]
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80be: 46c0 nop ; \(mov r8, r8\)
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80c0: 0000808a .word 0x0000808a
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80c4: 4801 ldr r0, \[pc, #4\] ; \(80cc <bar\+0x2c>\)
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80c6: 46c0 nop ; \(mov r8, r8\)
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80c8: 46c0 nop ; \(mov r8, r8\)
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80ca: 46c0 nop ; \(mov r8, r8\)
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80cc: 0000000c .word 0x0000000c
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80d0: 4801 ldr r0, \[pc, #4\] ; \(80d8 <bar\+0x38>\)
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80d2: bf00 nop
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80d4: bf00 nop
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80d6: 46c0 nop ; \(mov r8, r8\)
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80d8: 0000000c .word 0x0000000c
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80dc: 4801 ldr r0, \[pc, #4\] ; \(80e4 <bar\+0x44>\)
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80de: bf00 nop
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80e0: bf00 nop
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80e2: 46c0 nop ; \(mov r8, r8\)
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80e4: 00000014 .word 0x00000014
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80e8: 4802 ldr r0, \[pc, #8\] ; \(80f4 <bar\+0x54>\)
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80ea: 4478 add r0, pc
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80ec: 6801 ldr r1, \[r0, #0\]
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80ee: 1c08 adds r0, r1, #0
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80f0: 46c0 nop ; \(mov r8, r8\)
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80f2: 46c0 nop ; \(mov r8, r8\)
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80f4: 00008056 .word 0x00008056
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80f8: 4802 ldr r0, \[pc, #8\] ; \(8104 <bar\+0x64>\)
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80fa: 4478 add r0, pc
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80fc: 6801 ldr r1, \[r0, #0\]
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80fe: 4608 mov r0, r1
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8100: 46c0 nop ; \(mov r8, r8\)
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8102: 46c0 nop ; \(mov r8, r8\)
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8104: 00008046 .word 0x00008046
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8108: 4802 ldr r0, \[pc, #8\] ; \(8114 <bar\+0x74>\)
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810a: 46c0 nop ; \(mov r8, r8\)
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810c: 46c0 nop ; \(mov r8, r8\)
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810e: 46c0 nop ; \(mov r8, r8\)
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8110: 46c0 nop ; \(mov r8, r8\)
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8112: 46c0 nop ; \(mov r8, r8\)
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8114: 0000000c .word 0x0000000c
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8118: 4802 ldr r0, \[pc, #8\] ; \(8124 <bar\+0x84>\)
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811a: 46c0 nop ; \(mov r8, r8\)
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811c: 46c0 nop ; \(mov r8, r8\)
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811e: 46c0 nop ; \(mov r8, r8\)
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8120: 46c0 nop ; \(mov r8, r8\)
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8122: 46c0 nop ; \(mov r8, r8\)
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8124: 0000000c .word 0x0000000c
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