binutils-gdb/opcodes
H.J. Lu 86fa6981e7 X86: Add pseudo prefixes to control encoding
Many x86 instructions have more than one encodings.  Assembler picks
the default one, usually the shortest one.  Although the ".s", ".d8"
and ".d32" suffixes can be used to swap register operands or specify
displacement size, they aren't very flexible.  This patch adds pseudo
prefixes, {xxx}, to control instruction encoding.  The available
pseudo prefixes are {disp8}, {disp32}, {load}, {store}, {vex2}, {vex3}
and {evex}.  Pseudo prefixes are preferred over the ".s", ".d8" and
".d32" suffixes, which are deprecated.

gas/

	* config/tc-i386.c (_i386_insn): Add dir_encoding and
	vec_encoding.  Remove swap_operand and need_vrex.
	(extra_symbol_chars): Add '}'.
	(md_begin): Mark '}' with LEX_BEGIN_NAME.  Allow '}' in
	mnemonic.
	(build_vex_prefix): Don't use 2-byte VEX encoding with
	{vex3}.  Check dir_encoding and load.
	(parse_insn): Check pseudo prefixes.  Set dir_encoding.
	(VEX_check_operands): Likewise.
	(match_template): Check dir_encoding and load.
	(parse_real_register): Set vec_encoding instead of need_vrex.
	(parse_register): Likewise.
	* doc/c-i386.texi: Document {disp8}, {disp32}, {load}, {store},
	{vex2}, {vex3} and {evex}.  Remove ".s", ".d8" and ".d32"
	* testsuite/gas/i386/i386.exp: Run pseudos and x86-64-pseudos.
	* testsuite/gas/i386/pseudos.d: New file.
	* testsuite/gas/i386/pseudos.s: Likewise.
	* testsuite/gas/i386/x86-64-pseudos.d: Likewise.
	* testsuite/gas/i386/x86-64-pseudos.s: Likewise.

opcodes/

	* i386-gen.c (opcode_modifiers): Replace S with Load.
	* i386-opc.h (S): Removed.
	(Load): New.
	(i386_opcode_modifier): Replace s with load.
	* i386-opc.tbl: Add {disp8}, {disp32}, {swap}, {vex2}, {vex3}
	and {evex}.  Replace S with Load.
	* i386-tbl.h: Regenerated.
2017-03-09 09:59:00 -08:00
..
po GDB: Add support for the new set/show disassembler-options commands. 2017-02-28 12:32:07 -06:00
.gitignore
aarch64-asm-2.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-asm.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-asm.h [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-dis-2.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-dis.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-dis.h [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-gen.c
aarch64-opc-2.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-opc.c [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-opc.h [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aarch64-tbl.h [AArch64] Additional SVE instructions 2017-02-24 18:29:00 +00:00
aclocal.m4
alpha-dis.c
alpha-opc.c
arc-dis.c [ARC] Provide an interface to decode ARC instructions. 2017-02-06 11:26:13 +01:00
arc-dis.h [ARC] Provide an interface to decode ARC instructions. 2017-02-06 11:26:13 +01:00
arc-ext-tbl.h
arc-ext.c
arc-ext.h
arc-fxi.h
arc-nps400-tbl.h
arc-opc.c [ARC] Fix assembler relaxation. 2017-02-15 12:02:28 +01:00
arc-regs.h Distinguish some of the registers different on ARC700 and HS38 cpus 2017-02-15 08:54:25 +00:00
arc-tbl.h [ARC] Provide an interface to decode ARC instructions. 2017-02-06 11:26:13 +01:00
arm-dis.c GDB: Add support for the new set/show disassembler-options commands. 2017-02-28 12:32:07 -06:00
avr-dis.c
bfin-dis.c
cgen-asm.c
cgen-asm.in
cgen-bitset.c
cgen-dis.c
cgen-dis.in
cgen-ibld.in
cgen-opc.c Fix use after free in cgen instruction lookup 2017-02-11 17:40:41 +10:30
cgen.sh
ChangeLog X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
ChangeLog-0001
ChangeLog-0203
ChangeLog-2004
ChangeLog-2005
ChangeLog-2006
ChangeLog-2007
ChangeLog-2008
ChangeLog-2009
ChangeLog-2010
ChangeLog-2011
ChangeLog-2012
ChangeLog-2013
ChangeLog-2014
ChangeLog-2015
ChangeLog-2016
ChangeLog-9297
ChangeLog-9899
config.in
configure
configure.ac
configure.com
cr16-dis.c
cr16-opc.c
cris-dis.c
cris-opc.c
crx-dis.c
crx-opc.c
d10v-dis.c
d10v-opc.c
d30v-dis.c
d30v-opc.c
dep-in.sed
dis-buf.c
dis-init.c
disassemble.c GDB: Add support for the new set/show disassembler-options commands. 2017-02-28 12:32:07 -06:00
dlx-dis.c
epiphany-asm.c
epiphany-desc.c
epiphany-desc.h
epiphany-dis.c
epiphany-ibld.c
epiphany-opc.c
epiphany-opc.h
fr30-asm.c
fr30-desc.c
fr30-desc.h
fr30-dis.c
fr30-ibld.c
fr30-opc.c
fr30-opc.h
frv-asm.c
frv-desc.c
frv-desc.h
frv-dis.c
frv-ibld.c
frv-opc.c
frv-opc.h
ft32-dis.c
ft32-opc.c
h8300-dis.c
h8500-dis.c
h8500-opc.h
hppa-dis.c
i370-dis.c
i370-opc.c
i386-dis-evex.h
i386-dis.c Add support for Intel CET instructions 2017-03-06 15:26:37 -08:00
i386-gen.c X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
i386-init.h Add support for Intel CET instructions 2017-03-06 15:26:37 -08:00
i386-opc.c
i386-opc.h X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
i386-opc.tbl X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
i386-reg.tbl
i386-tbl.h X86: Add pseudo prefixes to control encoding 2017-03-09 09:59:00 -08:00
i860-dis.c
i960-dis.c
ia64-asmtab.c
ia64-asmtab.h
ia64-dis.c
ia64-gen.c
ia64-ic.tbl
ia64-opc-a.c
ia64-opc-b.c
ia64-opc-d.c
ia64-opc-f.c
ia64-opc-i.c
ia64-opc-m.c
ia64-opc-x.c
ia64-opc.c
ia64-opc.h
ia64-raw.tbl
ia64-war.tbl
ia64-waw.tbl
ip2k-asm.c
ip2k-desc.c
ip2k-desc.h
ip2k-dis.c
ip2k-ibld.c
ip2k-opc.c
ip2k-opc.h
iq2000-asm.c
iq2000-desc.c
iq2000-desc.h
iq2000-dis.c
iq2000-ibld.c
iq2000-opc.c
iq2000-opc.h
lm32-asm.c
lm32-desc.c
lm32-desc.h
lm32-dis.c
lm32-ibld.c
lm32-opc.c
lm32-opc.h
lm32-opinst.c
m32c-asm.c
m32c-desc.c
m32c-desc.h
m32c-dis.c
m32c-ibld.c
m32c-opc.c
m32c-opc.h
m32r-asm.c
m32r-desc.c
m32r-desc.h
m32r-dis.c
m32r-ibld.c
m32r-opc.c
m32r-opc.h
m32r-opinst.c
m68hc11-dis.c
m68hc11-opc.c
m68k-dis.c
m68k-opc.c
m88k-dis.c
m10200-dis.c
m10200-opc.c
m10300-dis.c
m10300-opc.c
MAINTAINERS
Makefile.am
Makefile.in
makefile.vms
mcore-dis.c
mcore-opc.h
mep-asm.c
mep-desc.c
mep-desc.h
mep-dis.c
mep-ibld.c
mep-opc.c
mep-opc.h
metag-dis.c
microblaze-dis.c
microblaze-dis.h
microblaze-opc.h
microblaze-opcm.h
micromips-opc.c
mips16-opc.c
mips-dis.c
mips-formats.h
mips-opc.c
mmix-dis.c
mmix-opc.c
moxie-dis.c
moxie-opc.c
msp430-decode.c
msp430-decode.opc
msp430-dis.c
mt-asm.c
mt-desc.c
mt-desc.h
mt-dis.c
mt-ibld.c
mt-opc.c
mt-opc.h
nds32-asm.c
nds32-asm.h
nds32-dis.c
nds32-opc.h
nios2-dis.c
nios2-opc.c
ns32k-dis.c
opc2c.c
opintl.h
or1k-asm.c
or1k-desc.c
or1k-desc.h
or1k-dis.c
or1k-ibld.c
or1k-opc.c
or1k-opc.h
or1k-opinst.c
pdp11-dis.c
pdp11-opc.c
pj-dis.c
pj-opc.c
ppc-dis.c Update -maltivec and -mvsx options to only enable their oldest instructions. 2017-03-08 20:49:03 -06:00
ppc-opc.c Add support for the new 'lnia' extended mnemonic. 2017-03-08 14:02:18 -06:00
pru-dis.c
pru-opc.c
riscv-dis.c
riscv-opc.c Add SFENCE.VMA instruction 2017-02-15 10:35:00 -08:00
rl78-decode.c
rl78-decode.opc
rl78-dis.c
rx-decode.c
rx-decode.opc
rx-dis.c
s390-dis.c GDB: Add support for the new set/show disassembler-options commands. 2017-02-28 12:32:07 -06:00
s390-mkopc.c S/390: Add support for new cpu architecture - arch12. 2017-02-23 18:27:38 +01:00
s390-opc.c S/390: Add support for new cpu architecture - arch12. 2017-02-23 18:27:38 +01:00
s390-opc.txt S/390: Add support for new cpu architecture - arch12. 2017-02-23 18:27:38 +01:00
score7-dis.c
score-dis.c
score-opc.h
sh64-dis.c
sh64-opc.c
sh64-opc.h
sh-dis.c
sh-opc.h
sparc-dis.c
sparc-opc.c opcodes,gas: associate SPARC ASIs with an architecture level. 2017-02-23 07:53:16 -08:00
spu-dis.c
spu-opc.c
stamp-h.in
sysdep.h
tic4x-dis.c
tic6x-dis.c Fix compile time warning messages when compiling binutils with gcc 7.0.1. 2017-02-03 09:04:21 +00:00
tic30-dis.c
tic54x-dis.c
tic54x-opc.c
tic80-dis.c
tic80-opc.c
tilegx-dis.c
tilegx-opc.c
tilepro-dis.c
tilepro-opc.c
v850-dis.c
v850-opc.c
vax-dis.c
visium-dis.c
visium-opc.c
w65-dis.c
w65-opc.h
xc16x-asm.c
xc16x-desc.c
xc16x-desc.h
xc16x-dis.c
xc16x-ibld.c
xc16x-opc.c
xc16x-opc.h
xgate-dis.c
xgate-opc.c
xstormy16-asm.c
xstormy16-desc.c
xstormy16-desc.h
xstormy16-dis.c
xstormy16-ibld.c
xstormy16-opc.c
xstormy16-opc.h
xtensa-dis.c
z8k-dis.c
z8k-opc.h
z8kgen.c
z80-dis.c