binutils-gdb/ld/testsuite/ld-ifunc/pr17154-x86-64.d
H.J. Lu 144bed8d4d Properly match PLT entry against .got.plt relocation
Relocations against .got.plt section may not be in the same order as
entries in PLT section.  It is incorrect to assume that the Ith reloction
index against .got.plt section always maps to the (I + 1)th entry in PLT
section.  This patch matches the .got.plt relocation offset/index in PLT
entry against the index in .got.plt relocation table.  It only checks
R_*_JUMP_SLOT and R_*_IRELATIVE relocations.  It ignores R_*_TLS_DESC
and R_*_TLSDESC relocations since they have different PLT entries.

bfd/

	PR binutils/17154
	* elf32-i386.c (elf_i386_plt_sym_val): Only match R_*_JUMP_SLOT
	and R_*_IRELATIVE relocation offset with PLT entry.
	* elf64-x86-64.c (elf_x86_64_plt_sym_val): Likewise.
	(elf_x86_64_plt_sym_val_offset_plt_bnd): New.
	(elf_x86_64_get_synthetic_symtab): Use it.

ld/testsuite/

	PR binutils/17154
	* ld-ifunc/pr17154-i386.d: New file.
	* ld-ifunc/pr17154-x86-64.d: Likewise.
	* ld-ifunc/pr17154-x86.s: Likewise.
	* ld-x86-64/bnd-ifunc-2.d: Likewise.
	* ld-x86-64/bnd-ifunc-2.s: Likewise.
	* ld-x86-64/mpx.exp: Run bnd-ifunc-2.
	* ld-x86-64/tlsdesc-nacl.pd: Updated.
	* ld-x86-64/tlsdesc.pd: Likewise.
2014-07-16 10:57:49 -07:00

47 lines
1.8 KiB
Makefile

#source: pr17154-x86.s
#as: --64
#ld: -shared -melf_x86_64
#objdump: -dw
#target: x86_64-*-*
#...
0+2d0 <\*ABS\*\+0x32a@plt-0x10>:
[ ]*[a-f0-9]+: ff 35 5a 01 20 00 pushq 0x20015a\(%rip\) # 200430 <_GLOBAL_OFFSET_TABLE_\+0x8>
[ ]*[a-f0-9]+: ff 25 5c 01 20 00 jmpq \*0x20015c\(%rip\) # 200438 <_GLOBAL_OFFSET_TABLE_\+0x10>
[ ]*[a-f0-9]+: 0f 1f 40 00 nopl 0x0\(%rax\)
0+2e0 <\*ABS\*\+0x32a@plt>:
[ ]*[a-f0-9]+: ff 25 5a 01 20 00 jmpq \*0x20015a\(%rip\) # 200440 <_GLOBAL_OFFSET_TABLE_\+0x18>
[ ]*[a-f0-9]+: 68 03 00 00 00 pushq \$0x3
[ ]*[a-f0-9]+: e9 e0 ff ff ff jmpq 2d0 <\*ABS\*\+0x32a@plt-0x10>
0+2f0 <func1@plt>:
[ ]*[a-f0-9]+: ff 25 52 01 20 00 jmpq \*0x200152\(%rip\) # 200448 <_GLOBAL_OFFSET_TABLE_\+0x20>
[ ]*[a-f0-9]+: 68 00 00 00 00 pushq \$0x0
[ ]*[a-f0-9]+: e9 d0 ff ff ff jmpq 2d0 <\*ABS\*\+0x32a@plt-0x10>
0+300 <func2@plt>:
[ ]*[a-f0-9]+: ff 25 4a 01 20 00 jmpq \*0x20014a\(%rip\) # 200450 <_GLOBAL_OFFSET_TABLE_\+0x28>
[ ]*[a-f0-9]+: 68 01 00 00 00 pushq \$0x1
[ ]*[a-f0-9]+: e9 c0 ff ff ff jmpq 2d0 <\*ABS\*\+0x32a@plt-0x10>
0+310 <\*ABS\*\+0x320@plt>:
[ ]*[a-f0-9]+: ff 25 42 01 20 00 jmpq \*0x200142\(%rip\) # 200458 <_GLOBAL_OFFSET_TABLE_\+0x30>
[ ]*[a-f0-9]+: 68 02 00 00 00 pushq \$0x2
[ ]*[a-f0-9]+: e9 b0 ff ff ff jmpq 2d0 <\*ABS\*\+0x32a@plt-0x10>
Disassembly of section .text:
0+320 <resolve1>:
[ ]*[a-f0-9]+: e8 cb ff ff ff callq 2f0 <func1@plt>
0+325 <g1>:
[ ]*[a-f0-9]+: e9 e6 ff ff ff jmpq 310 <\*ABS\*\+0x320@plt>
0+32a <resolve2>:
[ ]*[a-f0-9]+: e8 d1 ff ff ff callq 300 <func2@plt>
0+32f <g2>:
[ ]*[a-f0-9]+: e9 ac ff ff ff jmpq 2e0 <\*ABS\*\+0x32a@plt>
#pass