mirror of
https://sourceware.org/git/binutils-gdb.git
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3f52fdbcb5
This commit fixes some failures in gdb.base/interrupt.exp when debugging a 32-bit i386 linux inferior from an amd64 host. When running the following test... make check RUNTESTFLAGS="--target_board unix/-m32 interrupt.exp" ... without this commit, I see the following output: FAIL: gdb.base/interrupt.exp: continue (the program exited) FAIL: gdb.base/interrupt.exp: echo data FAIL: gdb.base/interrupt.exp: Send Control-C, second time FAIL: gdb.base/interrupt.exp: signal SIGINT (the program is no longer running) ERROR: Undefined command "". ERROR: GDB process no longer exists === gdb Summary === When the test is run with this commit in place, we see 12 passes instead. This is the desired behavior. Analysis: On Linux, when a syscall is interrupted by a signal, the syscall may return -ERESTARTSYS when a signal occurs. Doing so indicates that the syscall is restartable. Then, depending on settings associated with the signal handler, and after the signal handler is called, the kernel can then either return -EINTR or can cause the syscall to be restarted. In this discussion, we are concerned with the latter case. On i386, the kernel returns this status via the EAX register. When debugging a 32-bit (i386) process from a 64-bit (amd64) GDB, the debugger fetches 64-bit registers even though the process being debugged is 32-bit. Since we're debugging a 32-bit target, only 32 bits are being saved in the register cache. Now, ideally, GDB would save all 64-bits in the regcache and then would be able to restore those same values when it comes time to continue the target. I've looked into doing this, but it's not easy and I don't see many benefits to doing so. One benefit, however, would be that EAX would appear as a negative value for doing syscall restarts. At the moment, GDB is setting the high 32 bits of RAX (and other registers too) to 0. So, when GDB restores EAX just prior to a syscall restart, the high 32 bits of RAX are zeroed, thus making it look like a positive value. For this particular purpose, we need to sign extend EAX so that RAX will appear as a negative value when EAX is set to -ERESTARTSYS. This in turn will cause the signal handling code in the kernel to recognize -ERESTARTSYS which will in turn cause the syscall to be restarted. This commit is based on work by Jan Kratochvil from 2009: https://sourceware.org/ml/gdb-patches/2009-11/msg00592.html Jan's patch had the sign extension code in amd64-nat.c. Several other native targets make use of this code, so it seemed better to move the sign extension code to a linux specific file. I also added similar code to gdbserver. Another approach is to fix the problem in the kernel. Hui Zhu tried to get a fix into the kernel back in 2014, but it was not accepted. Discussion regarding this approach may be found here: https://lore.kernel.org/patchwork/patch/457841/ Even if a fix were to be put into the kernel, we'd still need some kind of fix in GDB in order to support older kernels. Finally, I'll note that Fedora has been carrying a similar patch for at least nine years. Other distributions, including RHEL and CentOS have picked up this change and have been using it too. gdb/ChangeLog: * amd64-linux-nat.c (amd64_linux_collect_native_gregset): New function. (fill_gregset): Call amd64_linux_collect_native_gregset instead of amd64_collect_native_gregset. (amd64_linux_nat_target::store_registers): Likewise. gdb/gdbserver/ChangeLog: * linux-x86-low.c (x86_fill_gregset): Sign extend EAX value when using a 64-bit gdbserver.
491 lines
15 KiB
C
491 lines
15 KiB
C
/* Native-dependent code for GNU/Linux x86-64.
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Copyright (C) 2001-2019 Free Software Foundation, Inc.
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Contributed by Jiri Smid, SuSE Labs.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "regcache.h"
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#include "elf/common.h"
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#include <sys/uio.h>
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#include "nat/gdb_ptrace.h"
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#include <asm/prctl.h>
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#include <sys/reg.h>
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#include "gregset.h"
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#include "gdb_proc_service.h"
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#include "amd64-nat.h"
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#include "amd64-tdep.h"
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#include "amd64-linux-tdep.h"
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#include "i386-linux-tdep.h"
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#include "common/x86-xstate.h"
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#include "x86-linux-nat.h"
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#include "nat/linux-ptrace.h"
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#include "nat/amd64-linux-siginfo.h"
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/* This definition comes from prctl.h. Kernels older than 2.5.64
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do not have it. */
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#ifndef PTRACE_ARCH_PRCTL
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#define PTRACE_ARCH_PRCTL 30
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#endif
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struct amd64_linux_nat_target final : public x86_linux_nat_target
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{
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/* Add our register access methods. */
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void fetch_registers (struct regcache *, int) override;
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void store_registers (struct regcache *, int) override;
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bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
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override;
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};
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static amd64_linux_nat_target the_amd64_linux_nat_target;
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/* Mapping between the general-purpose registers in GNU/Linux x86-64
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`struct user' format and GDB's register cache layout for GNU/Linux
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i386.
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Note that most GNU/Linux x86-64 registers are 64-bit, while the
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GNU/Linux i386 registers are all 32-bit, but since we're
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little-endian we get away with that. */
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/* From <sys/reg.h> on GNU/Linux i386. */
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static int amd64_linux_gregset32_reg_offset[] =
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{
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RAX * 8, RCX * 8, /* %eax, %ecx */
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RDX * 8, RBX * 8, /* %edx, %ebx */
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RSP * 8, RBP * 8, /* %esp, %ebp */
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RSI * 8, RDI * 8, /* %esi, %edi */
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RIP * 8, EFLAGS * 8, /* %eip, %eflags */
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CS * 8, SS * 8, /* %cs, %ss */
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DS * 8, ES * 8, /* %ds, %es */
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FS * 8, GS * 8, /* %fs, %gs */
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
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-1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
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-1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
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-1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
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-1, /* PKEYS register PKRU */
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ORIG_RAX * 8 /* "orig_eax" */
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};
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/* Transfering the general-purpose registers between GDB, inferiors
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and core files. */
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/* See amd64_collect_native_gregset. This linux specific version handles
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issues with negative EAX values not being restored correctly upon syscall
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return when debugging 32-bit targets. It has no effect on 64-bit
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targets. */
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static void
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amd64_linux_collect_native_gregset (const struct regcache *regcache,
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void *gregs, int regnum)
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{
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amd64_collect_native_gregset (regcache, gregs, regnum);
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struct gdbarch *gdbarch = regcache->arch ();
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if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
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{
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/* Sign extend EAX value to avoid potential syscall restart
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problems.
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On Linux, when a syscall is interrupted by a signal, the
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(kernel function implementing the) syscall may return
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-ERESTARTSYS when a signal occurs. Doing so indicates that
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the syscall is restartable. Then, depending on settings
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associated with the signal handler, and after the signal
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handler is called, the kernel can then either return -EINTR
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or it can cause the syscall to be restarted. We are
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concerned with the latter case here.
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On (32-bit) i386, the status (-ERESTARTSYS) is placed in the
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EAX register. When debugging a 32-bit process from a 64-bit
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(amd64) GDB, the debugger fetches 64-bit registers even
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though the process being debugged is only 32-bit. The
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register cache is only 32 bits wide though; GDB discards the
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high 32 bits when placing 64-bit values in the 32-bit
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regcache. Normally, this is not a problem since the 32-bit
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process should only care about the lower 32-bit portions of
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these registers. That said, it can happen that the 64-bit
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value being restored will be different from the 64-bit value
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that was originally retrieved from the kernel. The one place
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(that we know of) where it does matter is in the kernel's
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syscall restart code. The kernel's code for restarting a
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syscall after a signal expects to see a negative value
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(specifically -ERESTARTSYS) in the 64-bit RAX register in
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order to correctly cause a syscall to be restarted.
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The call to amd64_collect_native_gregset, above, is setting
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the high 32 bits of RAX (and other registers too) to 0. For
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syscall restart, we need to sign extend EAX so that RAX will
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appear as a negative value when EAX is set to -ERESTARTSYS.
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This in turn will cause the signal handling code in the
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kernel to recognize -ERESTARTSYS which will in turn cause the
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syscall to be restarted.
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The test case gdb.base/interrupt.exp tests for this problem.
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Without this sign extension code in place, it'll show
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a number of failures when testing against unix/-m32. */
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if (regnum == -1 || regnum == I386_EAX_REGNUM)
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{
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void *ptr = ((gdb_byte *) gregs
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+ amd64_linux_gregset32_reg_offset[I386_EAX_REGNUM]);
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*(int64_t *) ptr = *(int32_t *) ptr;
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}
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}
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}
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/* Fill GDB's register cache with the general-purpose register values
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in *GREGSETP. */
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void
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supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
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{
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amd64_supply_native_gregset (regcache, gregsetp, -1);
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}
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/* Fill register REGNUM (if it is a general-purpose register) in
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*GREGSETP with the value in GDB's register cache. If REGNUM is -1,
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do this for all registers. */
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void
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fill_gregset (const struct regcache *regcache,
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elf_gregset_t *gregsetp, int regnum)
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{
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amd64_linux_collect_native_gregset (regcache, gregsetp, regnum);
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}
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/* Transfering floating-point registers between GDB, inferiors and cores. */
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/* Fill GDB's register cache with the floating-point and SSE register
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values in *FPREGSETP. */
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void
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supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
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{
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amd64_supply_fxsave (regcache, -1, fpregsetp);
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}
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/* Fill register REGNUM (if it is a floating-point or SSE register) in
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*FPREGSETP with the value in GDB's register cache. If REGNUM is
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-1, do this for all registers. */
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void
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fill_fpregset (const struct regcache *regcache,
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elf_fpregset_t *fpregsetp, int regnum)
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{
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amd64_collect_fxsave (regcache, regnum, fpregsetp);
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}
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/* Transferring arbitrary registers between GDB and inferior. */
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/* Fetch register REGNUM from the child process. If REGNUM is -1, do
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this for all registers (including the floating point and SSE
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registers). */
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void
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amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int tid;
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/* GNU/Linux LWP ID's are process ID's. */
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tid = regcache->ptid ().lwp ();
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if (tid == 0)
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tid = regcache->ptid ().pid (); /* Not a threaded program. */
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if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't get registers"));
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amd64_supply_native_gregset (regcache, ®s, -1);
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if (regnum != -1)
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return;
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}
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if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_fpregset_t fpregs;
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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char xstateregs[X86_XSTATE_MAX_SIZE];
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struct iovec iov;
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iov.iov_base = xstateregs;
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iov.iov_len = sizeof (xstateregs);
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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amd64_supply_xsave (regcache, -1, xstateregs);
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}
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else
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{
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if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
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perror_with_name (_("Couldn't get floating point status"));
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amd64_supply_fxsave (regcache, -1, &fpregs);
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}
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#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
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{
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/* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
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fs_base and gs_base fields of user_regs_struct can be
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used directly. */
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unsigned long base;
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if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
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{
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if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_FS) < 0)
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perror_with_name (_("Couldn't get segment register fs_base"));
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regcache->raw_supply (AMD64_FSBASE_REGNUM, &base);
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}
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if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
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{
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if (ptrace (PTRACE_ARCH_PRCTL, tid, &base, ARCH_GET_GS) < 0)
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perror_with_name (_("Couldn't get segment register gs_base"));
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regcache->raw_supply (AMD64_GSBASE_REGNUM, &base);
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}
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}
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#endif
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}
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}
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/* Store register REGNUM back into the child process. If REGNUM is
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-1, do this for all registers (including the floating-point and SSE
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registers). */
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void
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amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = regcache->arch ();
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int tid;
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/* GNU/Linux LWP ID's are process ID's. */
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tid = regcache->ptid ().lwp ();
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if (tid == 0)
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tid = regcache->ptid ().pid (); /* Not a threaded program. */
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if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't get registers"));
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amd64_linux_collect_native_gregset (regcache, ®s, regnum);
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if (ptrace (PTRACE_SETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't write registers"));
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if (regnum != -1)
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return;
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}
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if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_fpregset_t fpregs;
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if (have_ptrace_getregset == TRIBOOL_TRUE)
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{
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char xstateregs[X86_XSTATE_MAX_SIZE];
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struct iovec iov;
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iov.iov_base = xstateregs;
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iov.iov_len = sizeof (xstateregs);
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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amd64_collect_xsave (regcache, regnum, xstateregs, 0);
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if (ptrace (PTRACE_SETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't write extended state status"));
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}
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else
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{
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if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
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perror_with_name (_("Couldn't get floating point status"));
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amd64_collect_fxsave (regcache, regnum, &fpregs);
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if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
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perror_with_name (_("Couldn't write floating point status"));
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}
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#ifndef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
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{
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/* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
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fs_base and gs_base fields of user_regs_struct can be
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used directly. */
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void *base;
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if (regnum == -1 || regnum == AMD64_FSBASE_REGNUM)
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{
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regcache->raw_collect (AMD64_FSBASE_REGNUM, &base);
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if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_FS) < 0)
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perror_with_name (_("Couldn't write segment register fs_base"));
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}
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if (regnum == -1 || regnum == AMD64_GSBASE_REGNUM)
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{
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regcache->raw_collect (AMD64_GSBASE_REGNUM, &base);
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if (ptrace (PTRACE_ARCH_PRCTL, tid, base, ARCH_SET_GS) < 0)
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perror_with_name (_("Couldn't write segment register gs_base"));
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}
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}
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#endif
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}
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}
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/* This function is called by libthread_db as part of its handling of
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a request for a thread's local storage address. */
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ps_err_e
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ps_get_thread_area (struct ps_prochandle *ph,
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lwpid_t lwpid, int idx, void **base)
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{
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if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
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{
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unsigned int base_addr;
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ps_err_e result;
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result = x86_linux_get_thread_area (lwpid, (void *) (long) idx,
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&base_addr);
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if (result == PS_OK)
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{
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/* Extend the value to 64 bits. Here it's assumed that
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a "long" and a "void *" are the same. */
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(*base) = (void *) (long) base_addr;
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}
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return result;
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}
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else
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{
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/* FIXME: ezannoni-2003-07-09 see comment above about include
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file order. We could be getting bogus values for these two. */
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gdb_assert (FS < ELF_NGREG);
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gdb_assert (GS < ELF_NGREG);
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switch (idx)
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{
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case FS:
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#ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
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{
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/* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
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fs_base and gs_base fields of user_regs_struct can be
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used directly. */
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unsigned long fs;
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errno = 0;
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fs = ptrace (PTRACE_PEEKUSER, lwpid,
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offsetof (struct user_regs_struct, fs_base), 0);
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if (errno == 0)
|
||
{
|
||
*base = (void *) fs;
|
||
return PS_OK;
|
||
}
|
||
}
|
||
#endif
|
||
if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
|
||
return PS_OK;
|
||
break;
|
||
case GS:
|
||
#ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
|
||
{
|
||
unsigned long gs;
|
||
errno = 0;
|
||
gs = ptrace (PTRACE_PEEKUSER, lwpid,
|
||
offsetof (struct user_regs_struct, gs_base), 0);
|
||
if (errno == 0)
|
||
{
|
||
*base = (void *) gs;
|
||
return PS_OK;
|
||
}
|
||
}
|
||
#endif
|
||
if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
|
||
return PS_OK;
|
||
break;
|
||
default: /* Should not happen. */
|
||
return PS_BADADDR;
|
||
}
|
||
}
|
||
return PS_ERR; /* ptrace failed. */
|
||
}
|
||
|
||
|
||
/* Convert a ptrace/host siginfo object, into/from the siginfo in the
|
||
layout of the inferiors' architecture. Returns true if any
|
||
conversion was done; false otherwise. If DIRECTION is 1, then copy
|
||
from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
|
||
INF. */
|
||
|
||
bool
|
||
amd64_linux_nat_target::low_siginfo_fixup (siginfo_t *ptrace,
|
||
gdb_byte *inf,
|
||
int direction)
|
||
{
|
||
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
|
||
|
||
/* Is the inferior 32-bit? If so, then do fixup the siginfo
|
||
object. */
|
||
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
||
return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
|
||
FIXUP_32);
|
||
/* No fixup for native x32 GDB. */
|
||
else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
|
||
return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
|
||
FIXUP_X32);
|
||
else
|
||
return false;
|
||
}
|
||
|
||
void
|
||
_initialize_amd64_linux_nat (void)
|
||
{
|
||
amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
|
||
amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
|
||
amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
|
||
amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
|
||
|
||
gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
|
||
== amd64_native_gregset32_num_regs);
|
||
|
||
linux_target = &the_amd64_linux_nat_target;
|
||
|
||
/* Add the target. */
|
||
add_inf_child_target (linux_target);
|
||
}
|