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https://sourceware.org/git/binutils-gdb.git
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1d506c26d9
This commit is the result of the following actions: - Running gdb/copyright.py to update all of the copyright headers to include 2024, - Manually updating a few files the copyright.py script told me to update, these files had copyright headers embedded within the file, - Regenerating gdbsupport/Makefile.in to refresh it's copyright date, - Using grep to find other files that still mentioned 2023. If these files were updated last year from 2022 to 2023 then I've updated them this year to 2024. I'm sure I've probably missed some dates. Feel free to fix them up as you spot them.
302 lines
8.9 KiB
C
302 lines
8.9 KiB
C
/* Native-dependent code for AArch64.
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Copyright (C) 2011-2024 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "gdbarch.h"
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#include "inferior.h"
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#include "cli/cli-cmds.h"
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#include "aarch64-nat.h"
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#include <unordered_map>
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/* Hash table storing per-process data. We don't bind this to a
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per-inferior registry because of targets like x86 GNU/Linux that
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need to keep track of processes that aren't bound to any inferior
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(e.g., fork children, checkpoints). */
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static std::unordered_map<pid_t, aarch64_debug_reg_state>
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aarch64_debug_process_state;
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/* See aarch64-nat.h. */
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struct aarch64_debug_reg_state *
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aarch64_lookup_debug_reg_state (pid_t pid)
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{
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auto it = aarch64_debug_process_state.find (pid);
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if (it != aarch64_debug_process_state.end ())
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return &it->second;
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return nullptr;
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}
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/* See aarch64-nat.h. */
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struct aarch64_debug_reg_state *
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aarch64_get_debug_reg_state (pid_t pid)
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{
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return &aarch64_debug_process_state[pid];
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}
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/* See aarch64-nat.h. */
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void
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aarch64_remove_debug_reg_state (pid_t pid)
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{
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aarch64_debug_process_state.erase (pid);
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}
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/* Returns the number of hardware watchpoints of type TYPE that we can
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set. Value is positive if we can set CNT watchpoints, zero if
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setting watchpoints of type TYPE is not supported, and negative if
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CNT is more than the maximum number of watchpoints of type TYPE
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that we can support. TYPE is one of bp_hardware_watchpoint,
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bp_read_watchpoint, bp_write_watchpoint, or bp_hardware_breakpoint.
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CNT is the number of such watchpoints used so far (including this
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one). OTHERTYPE is non-zero if other types of watchpoints are
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currently enabled. */
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int
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aarch64_can_use_hw_breakpoint (enum bptype type, int cnt, int othertype)
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{
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if (type == bp_hardware_watchpoint || type == bp_read_watchpoint
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|| type == bp_access_watchpoint || type == bp_watchpoint)
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{
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if (aarch64_num_wp_regs == 0)
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return 0;
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}
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else if (type == bp_hardware_breakpoint)
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{
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if (aarch64_num_bp_regs == 0)
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return 0;
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}
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else
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gdb_assert_not_reached ("unexpected breakpoint type");
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/* We always return 1 here because we don't have enough information
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about possible overlap of addresses that they want to watch. As an
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extreme example, consider the case where all the watchpoints watch
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the same address and the same region length: then we can handle a
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virtually unlimited number of watchpoints, due to debug register
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sharing implemented via reference counts. */
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return 1;
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}
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/* Insert a hardware-assisted breakpoint at BP_TGT->reqstd_address.
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Return 0 on success, -1 on failure. */
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int
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aarch64_insert_hw_breakpoint (struct gdbarch *gdbarch,
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struct bp_target_info *bp_tgt)
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{
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int ret;
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CORE_ADDR addr = bp_tgt->placed_address = bp_tgt->reqstd_address;
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int len;
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const enum target_hw_bp_type type = hw_execute;
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (inferior_ptid.pid ());
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gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
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if (show_debug_regs)
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gdb_printf (gdb_stdlog,
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"insert_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
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(unsigned long) addr, len);
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ret = aarch64_handle_breakpoint (type, addr, len, 1 /* is_insert */,
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inferior_ptid, state);
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if (show_debug_regs)
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{
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aarch64_show_debug_reg_state (state,
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"insert_hw_breakpoint", addr, len, type);
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}
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return ret;
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}
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/* Remove a hardware-assisted breakpoint at BP_TGT->placed_address.
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Return 0 on success, -1 on failure. */
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int
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aarch64_remove_hw_breakpoint (struct gdbarch *gdbarch,
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struct bp_target_info *bp_tgt)
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{
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int ret;
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CORE_ADDR addr = bp_tgt->placed_address;
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int len = 4;
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const enum target_hw_bp_type type = hw_execute;
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (inferior_ptid.pid ());
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gdbarch_breakpoint_from_pc (gdbarch, &addr, &len);
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if (show_debug_regs)
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gdb_printf (gdb_stdlog,
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"remove_hw_breakpoint on entry (addr=0x%08lx, len=%d))\n",
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(unsigned long) addr, len);
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ret = aarch64_handle_breakpoint (type, addr, len, 0 /* is_insert */,
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inferior_ptid, state);
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if (show_debug_regs)
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{
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aarch64_show_debug_reg_state (state,
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"remove_hw_watchpoint", addr, len, type);
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}
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return ret;
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}
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/* Insert a watchpoint to watch a memory region which starts at
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address ADDR and whose length is LEN bytes. Watch memory accesses
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of the type TYPE. Return 0 on success, -1 on failure. */
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int
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aarch64_insert_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
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struct expression *cond)
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{
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int ret;
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (inferior_ptid.pid ());
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if (show_debug_regs)
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gdb_printf (gdb_stdlog,
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"insert_watchpoint on entry (addr=0x%08lx, len=%d)\n",
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(unsigned long) addr, len);
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gdb_assert (type != hw_execute);
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ret = aarch64_handle_watchpoint (type, addr, len, 1 /* is_insert */,
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inferior_ptid, state);
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if (show_debug_regs)
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{
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aarch64_show_debug_reg_state (state,
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"insert_watchpoint", addr, len, type);
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}
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return ret;
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}
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/* Remove a watchpoint that watched the memory region which starts at
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address ADDR, whose length is LEN bytes, and for accesses of the
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type TYPE. Return 0 on success, -1 on failure. */
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int
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aarch64_remove_watchpoint (CORE_ADDR addr, int len, enum target_hw_bp_type type,
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struct expression *cond)
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{
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int ret;
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struct aarch64_debug_reg_state *state
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= aarch64_get_debug_reg_state (inferior_ptid.pid ());
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if (show_debug_regs)
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gdb_printf (gdb_stdlog,
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"remove_watchpoint on entry (addr=0x%08lx, len=%d)\n",
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(unsigned long) addr, len);
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gdb_assert (type != hw_execute);
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ret = aarch64_handle_watchpoint (type, addr, len, 0 /* is_insert */,
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inferior_ptid, state);
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if (show_debug_regs)
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{
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aarch64_show_debug_reg_state (state,
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"remove_watchpoint", addr, len, type);
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}
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return ret;
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}
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/* See aarch64-nat.h. */
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bool
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aarch64_stopped_data_address (const struct aarch64_debug_reg_state *state,
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CORE_ADDR addr_trap, CORE_ADDR *addr_p)
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{
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int i;
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for (i = aarch64_num_wp_regs - 1; i >= 0; --i)
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{
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const unsigned int offset
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= aarch64_watchpoint_offset (state->dr_ctrl_wp[i]);
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const unsigned int len = aarch64_watchpoint_length (state->dr_ctrl_wp[i]);
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const CORE_ADDR addr_watch = state->dr_addr_wp[i] + offset;
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const CORE_ADDR addr_watch_aligned = align_down (state->dr_addr_wp[i], 8);
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const CORE_ADDR addr_orig = state->dr_addr_orig_wp[i];
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if (state->dr_ref_count_wp[i]
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&& DR_CONTROL_ENABLED (state->dr_ctrl_wp[i])
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&& addr_trap >= addr_watch_aligned
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&& addr_trap < addr_watch + len)
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{
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/* ADDR_TRAP reports the first address of the memory range
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accessed by the CPU, regardless of what was the memory
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range watched. Thus, a large CPU access that straddles
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the ADDR_WATCH..ADDR_WATCH+LEN range may result in an
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ADDR_TRAP that is lower than the
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ADDR_WATCH..ADDR_WATCH+LEN range. E.g.:
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addr: | 4 | 5 | 6 | 7 | 8 |
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|---- range watched ----|
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|----------- range accessed ------------|
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In this case, ADDR_TRAP will be 4.
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To match a watchpoint known to GDB core, we must never
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report *ADDR_P outside of any ADDR_WATCH..ADDR_WATCH+LEN
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range. ADDR_WATCH <= ADDR_TRAP < ADDR_ORIG is a false
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positive on kernels older than 4.10. See PR
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external/20207. */
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*addr_p = addr_orig;
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return true;
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}
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}
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return false;
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}
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/* Define AArch64 maintenance commands. */
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static void
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add_show_debug_regs_command (void)
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{
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/* A maintenance command to enable printing the internal DRi mirror
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variables. */
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add_setshow_boolean_cmd ("show-debug-regs", class_maintenance,
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&show_debug_regs, _("\
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Set whether to show variables that mirror the AArch64 debug registers."), _("\
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Show whether to show variables that mirror the AArch64 debug registers."), _("\
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Use \"on\" to enable, \"off\" to disable.\n\
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If enabled, the debug registers values are shown when GDB inserts\n\
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or removes a hardware breakpoint or watchpoint, and when the inferior\n\
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triggers a breakpoint or watchpoint."),
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NULL,
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NULL,
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&maintenance_set_cmdlist,
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&maintenance_show_cmdlist);
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}
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void
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aarch64_initialize_hw_point ()
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{
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add_show_debug_regs_command ();
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}
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