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8382113fdb
Hi,
This patch is part of a series that adds support for Armv8.6-A
(Matrix Multiply and BFloat16 extensions) to binutils.
This patch introduces the Matrix Multiply (Int8, F32, F64) extensions
to the aarch64 backend.
The following instructions are added: {s/u}mmla, usmmla, {us/su}dot,
fmmla, ld1rob, ld1roh, d1row, ld1rod, uzip{1/2}, trn{1/2}.
Committed on behalf of Mihail Ionescu.
gas/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* config/tc-aarch64.c: Add new arch fetures to suppport the mm extension.
(parse_operands): Add new operand.
* testsuite/gas/aarch64/i8mm.s: New test.
* testsuite/gas/aarch64/i8mm.d: New test.
* testsuite/gas/aarch64/f32mm.s: New test.
* testsuite/gas/aarch64/f32mm.d: New test.
* testsuite/gas/aarch64/f64mm.s: New test.
* testsuite/gas/aarch64/f64mm.d: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.s: New test.
* testsuite/gas/aarch64/sve-movprfx-mm.d: New test.
include/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* opcode/aarch64.h (AARCH64_FEATURE_I8MM): New.
(AARCH64_FEATURE_F32MM): New.
(AARCH64_FEATURE_F64MM): New.
(AARCH64_OPND_SVE_ADDR_RI_S4x32): New.
(enum aarch64_insn_class): Add new instruction class "aarch64_misc" for
instructions that do not require special handling.
opcodes/ChangeLog:
2019-11-07 Mihail Ionescu <mihail.ionescu@arm.com>
* aarch64-tbl.h (aarch64_feature_i8mm_sve, aarch64_feature_f32mm_sve,
aarch64_feature_f64mm_sve, aarch64_feature_i8mm, aarch64_feature_f32mm,
aarch64_feature_f64mm): New feature sets.
(INT8MATMUL_INSN, F64MATMUL_SVE_INSN, F64MATMUL_INSN,
F32MATMUL_SVE_INSN, F32MATMUL_INSN): New macros to define matrix multiply
instructions.
(I8MM_SVE, F32MM_SVE, F64MM_SVE, I8MM, F32MM, F64MM): New feature set
macros.
(QL_MMLA64, OP_SVE_SBB): New qualifiers.
(OP_SVE_QQQ): New qualifier.
(INT8MATMUL_SVE_INSNC, F64MATMUL_SVE_INSNC,
F32MATMUL_SVE_INSNC): New feature set for bfloat16 instructions to support
the movprfx constraint.
(aarch64_opcode_table): Support for SVE_ADDR_RI_S4x32.
(aarch64_opcode_table): Define new instructions smmla,
ummla, usmmla, usdot, sudot, fmmla, ld1rob, ld1roh, ld1row, ld1rod
uzip{1/2}, trn{1/2}.
* aarch64-opc.c (operand_general_constraint_met_p): Handle
AARCH64_OPND_SVE_ADDR_RI_S4x32.
(aarch64_print_operand): Handle AARCH64_OPND_SVE_ADDR_RI_S4x32.
* aarch64-dis-2.c (aarch64_opcode_lookup_1, aarch64_find_next_opcode):
Account for new instructions.
* opcodes/aarch64-asm-2.c (aarch64_insert_operand): Support the new
S4x32 operand.
* aarch64-opc-2.c (aarch64_operands): Support the new S4x32 operand.
Regression tested on arm-none-eabi.
Is it ok for trunk?
Regards,
Mihail
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| .. | ||
| aout | ||
| cgen | ||
| coff | ||
| elf | ||
| gdb | ||
| mach-o | ||
| opcode | ||
| som | ||
| vms | ||
| alloca-conf.h | ||
| ansidecl.h | ||
| bfdlink.h | ||
| binary-io.h | ||
| bout.h | ||
| ChangeLog | ||
| ChangeLog-0415 | ||
| ChangeLog-2016 | ||
| ChangeLog-2017 | ||
| ChangeLog-2018 | ||
| ChangeLog-9103 | ||
| COPYING | ||
| COPYING3 | ||
| ctf-api.h | ||
| ctf.h | ||
| demangle.h | ||
| diagnostics.h | ||
| dis-asm.h | ||
| dwarf2.def | ||
| dwarf2.h | ||
| dyn-string.h | ||
| environ.h | ||
| fibheap.h | ||
| filenames.h | ||
| floatformat.h | ||
| fnmatch.h | ||
| fopen-bin.h | ||
| fopen-same.h | ||
| fopen-vms.h | ||
| gcc-c-fe.def | ||
| gcc-c-interface.h | ||
| gcc-cp-fe.def | ||
| gcc-cp-interface.h | ||
| gcc-interface.h | ||
| getopt.h | ||
| hashtab.h | ||
| hp-symtab.h | ||
| leb128.h | ||
| libiberty.h | ||
| longlong.h | ||
| lto-symtab.h | ||
| MAINTAINERS | ||
| md5.h | ||
| oasys.h | ||
| objalloc.h | ||
| obstack.h | ||
| os9k.h | ||
| partition.h | ||
| plugin-api.h | ||
| progress.h | ||
| safe-ctype.h | ||
| sha1.h | ||
| simple-object.h | ||
| sort.h | ||
| splay-tree.h | ||
| symcat.h | ||
| timeval-utils.h | ||
| vtv-change-permission.h | ||
| xregex2.h | ||
| xregex.h | ||
| xtensa-config.h | ||
| xtensa-isa-internal.h | ||
| xtensa-isa.h | ||