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There is some inconsistency between the behaviour of objdump -D and objdump -s, both supposedly operating on all sections by default. objdump -s ignores bss sections, while objdump -D dissassembles the zeros. Fix this by making objdump -D ignore bss sections too. Furthermore, "objdump -s -j .bss" doesn't dump .bss as it should, since the user is specifically asking to look at all those zeros. This change does find some tests that used objdump -D with expected output in bss-style sections. I've updated all the msp430 tests that just wanted to find a non-empty section to look at section headers instead, making the tests slightly more stringent. The ppc xcoff and spu tests are fixed by adding -j options to objdump, which makes the tests somewhat more lenient. binutils/ * objdump.c (disassemble_section): Ignore sections without contents, unless overridden by -j. (dump_section): Allow -j to override the default of not displaying sections without contents. * doc/binutils.texi (objdump options): Update -D, -s and -j description. gas/ * testsuite/gas/ppc/xcoff-tls-32.d: Select wanted objdump sections with -j. * testsuite/gas/ppc/xcoff-tls-64.d: Likewise. ld/ * testsuite/ld-msp430-elf/main-bss-lower.d, * testsuite/ld-msp430-elf/main-bss-upper.d, * testsuite/ld-msp430-elf/main-const-lower.d, * testsuite/ld-msp430-elf/main-const-upper.d, * testsuite/ld-msp430-elf/main-text-lower.d, * testsuite/ld-msp430-elf/main-text-upper.d, * testsuite/ld-msp430-elf/main-var-lower.d, * testsuite/ld-msp430-elf/main-var-upper.d: Expect -wh output. * testsuite/ld-msp430-elf/msp430-elf.exp: Use objdump -wh rather than objdump -D or objdump -d with tests checking for non-empty given sections. * testsuite/ld-spu/ear.d, * testsuite/ld-spu/icache1.d, * testsuite/ld-spu/ovl.d, * testsuite/ld-spu/ovl2.d: Select wanted objdump sections.
146 lines
2.6 KiB
Makefile
146 lines
2.6 KiB
Makefile
#source: ovl2.s
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#ld: -N -T ovl2.lnk -T ovl.lnk --emit-relocs
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#objdump: -D -r -j.text -j.ov_a1 -j.ov_a2 -j.data -j.toe -j.nonalloc -j.note.spu_name
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.*elf32-spu
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Disassembly of section \.text:
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00000100 <_start>:
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.* brsl \$0,.* <00000000\.ovl_call\.f1_a1>.*
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.*SPU_REL16 f1_a1
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.* brsl \$0,.* <00000000\.ovl_call\.setjmp>.*
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.*SPU_REL16 setjmp
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.* br 100 <_start> # 100
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.*SPU_REL16 _start
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0000010c <setjmp>:
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.* bi \$0
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00000110 <longjmp>:
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.* bi \$0
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.*00 00 03 40.*
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.*SPU_ADDR32 \.ov_a1\+0x14
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\.\.\.
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#...
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00000320 <00000000\.ovl_call.f1_a1>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1040 # 410
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.* bra? .* <__ovly_load>.*
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00000330 <00000000\.ovl_call.setjmp>:
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.* ila \$78,0
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.* lnop
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.* ila \$79,268 # 10c
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.* bra? .* <__ovly_load>.*
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00000340 <00000000\.ovl_call\.13:5>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1044 # 414
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.* bra? .* <__ovly_load>.*
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00000350 <_SPUEAR_f1_a2>:
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.* ila \$78,2
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.* lnop
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.* ila \$79,1040 # 410
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.* bra? .* <__ovly_load>.*
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#00000318 <00000000\.ovl_call.f1_a1>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 04 04 00.*
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#
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#00000320 <00000000\.ovl_call.setjmp>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 00 01 0c.*
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#
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#00000328 <_SPUEAR_f1_a2>:
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#.* bra?sl \$75,.* <__ovly_load>.*
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#.*00 08 04 00.*
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Disassembly of section \.ov_a1:
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00000400 <00000001\.ovl_call\.14:6>:
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.* ila \$78,2
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.* lnop
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.* ila \$79,1044 # 414
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.* bra? .* <__ovly_load>.*
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00000410 <f1_a1>:
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.* bi \$0
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.*00 00 04 14.*
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.*SPU_ADDR32 \.ov_a1\+0x14
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.*00 00 04 20.*
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.*SPU_ADDR32 \.ov_a1\+0x20
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.*00 00 04 00.*
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.*SPU_ADDR32 \.ov_a2\+0x14
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Disassembly of section \.ov_a2:
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00000400 <00000002\.ovl_call\.13:5>:
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.* ila \$78,1
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.* lnop
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.* ila \$79,1056 # 420
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.* bra? .* <__ovly_load>.*
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00000410 <f1_a2>:
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.* br .* <longjmp>.*
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.*SPU_REL16 longjmp
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.*00 00 04 00.*
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.*SPU_ADDR32 \.ov_a1\+0x20
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.*00 00 04 1c.*
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.*SPU_ADDR32 \.ov_a2\+0x1c
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.*00 00 00 00.*
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Disassembly of section \.data:
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00000420 <_ovly_table-0x10>:
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.*00 00 00 00 .*
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.*00 00 00 01 .*
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\.\.\.
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00000430 <_ovly_table>:
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.*00 00 04 00 .*
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.*00 00 00 20 .*
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#.*00 00 03 10 .*
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.*00 00 01 00 .*
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.*00 00 00 01 .*
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.*00 00 04 00 .*
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.*00 00 00 20 .*
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#.*00 00 03 20 .*
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.*00 00 01 20 .*
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.*00 00 00 01 .*
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00000450 <_ovly_buf_table>:
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.*00 00 00 00 .*
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Disassembly of section \.toe:
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00000460 <_EAR_>:
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\.\.\.
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Disassembly of section .nonalloc:
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00000000 <.nonalloc>:
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.*00 00 04 14.*
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.*SPU_ADDR32 \.ov_a1\+0x14
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.*00 00 04 20.*
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.*SPU_ADDR32 \.ov_a1\+0x20
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.*00 00 04 14.*
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.*SPU_ADDR32 \.ov_a2\+0x14
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.*00 00 04 1c.*
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.*SPU_ADDR32 \.ov_a2\+0x1c
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Disassembly of section \.note\.spu_name:
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.* <\.note\.spu_name>:
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.*: 00 00 00 08 .*
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.*: 00 00 00 0c .*
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.*: 00 00 00 01 .*
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.*: 53 50 55 4e .*
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.*: 41 4d 45 00 .*
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.*: 74 6d 70 64 .*
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.*: 69 72 2f 64 .*
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.*: 75 6d 70 00 .*
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