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01f9f808e2
This patch adds support for the Intel(R) Advanced Vector Extensions 512 (Intel(R) AVX-512) registers. Native and remote debugging are covered by this patch. Intel(R) AVX-512 is an extension to AVX to support 512-bit wide SIMD registers in 64-bit mode (XMM0-XMM31, YMM0-YMM31, ZMM0-ZMM31). The number of available registers in 32-bit mode is still 8 (XMM0-7, YMM0-7, ZMM0-7). The lower 256-bits of the ZMM registers are aliased to the respective 256-bit YMM registers. The lower 128-bits are aliased to the respective 128-bit XMM registers. There are also 8 new, dedicated mask registers (K0-K7) in both 32-bit mode and 64-bit mode. For more information please see Intel(R) Developer Zone: Intel(R) AVX http://software.intel.com/en-us/intel-isa-extensions#pid-16007-1495 Intel(R) Architecture Instruction Set Extensions Programming Reference: http://software.intel.com/en-us/file/319433-017pdf 2014-04-24 Michael Sturm <michael.sturm@mintel.com> Walfred Tedeschi <walfred.tedeschi@intel.com> * amd64-linux-nat.c (amd64_linux_gregset32_reg_offset): Add AVX512 registers. (amd64_linux_read_description): Add code to handle AVX512 xstate mask and return respective tdesc. * amd64-linux-tdep.c: Include features/i386/amd64-avx512-linux.c and features/i386/x32-avx512-linux.c. (amd64_linux_gregset_reg_offset): Add AVX512 registers. (amd64_linux_core_read_description): Add code to handle AVX512 xstate mask and return respective tdesc. (_initialize_amd64_linux_tdep): Initialize AVX512 tdesc. * amd64-linux-tdep.h (AMD64_LINUX_ORIG_RAX_REGNUM): Adjust regnum calculation. (AMD64_LINUX_NUM_REGS): Adjust to new number of registers. (tdesc_amd64_avx512_linux): New prototype. (tdesc_x32_avx512_linux): Likewise. * amd64-tdep.c: Include features/i386/amd64-avx512.c and features/i386/x32-avx512.c. (amd64_ymm_avx512_names): New register names for pseudo registers YMM16-31. (amd64_ymmh_avx512_names): New register names for raw registers YMMH16-31. (amd64_k_names): New register names for K registers. (amd64_zmmh_names): New register names for ZMM raw registers. (amd64_zmm_names): New registers names for ZMM pseudo registers. (amd64_xmm_avx512_names): New register names for XMM16-31 registers. (amd64_pseudo_register_name): Add code to return AVX512 pseudo registers. (amd64_init_abi): Add code to intitialize AVX512 tdep variables if feature is present. (_initialize_amd64_tdep): Call AVX512 tdesc initializers. * amd64-tdep.h (enum amd64_regnum): Add AVX512 registers. (AMD64_NUM_REGS): Adjust to new number of registers. * i386-linux-nat.c (GETXSTATEREGS_SUPPLIES): Extend range of registers supplied via XSTATE by AVX512 registers. (i386_linux_read_description): Add case for AVX512. * i386-linux-tdep.c: Include i386-avx512-linux.c. (i386_linux_gregset_reg_offset): Add AVX512 registers. (i386_linux_core_read_description): Add case for AVX512. (i386_linux_init_abi): Install supported register note section for AVX512. (_initialize_i386_linux_tdep): Add call to tdesc init function for AVX512. * i386-linux-tdep.h (I386_LINUX_NUM_REGS): Set number of registers to be number of zmm7h + 1. (tdesc_i386_avx512_linux): Add tdesc for AVX512 registers. * i386-tdep.c: Include features/i386/i386-avx512.c. (i386_zmm_names): Add ZMM pseudo register names array. (i386_zmmh_names): Add ZMM raw register names array. (i386_k_names): Add K raw register names array. (num_lower_zmm_regs): Add constant for the number of lower ZMM registers. AVX512 has 16 more ZMM registers than there are YMM registers. (i386_zmmh_regnum_p): Add function to look up register number of ZMM raw registers. (i386_zmm_regnum_p): Likewise for ZMM pseudo registers. (i386_k_regnum_p): Likewise for K raw registers. (i386_ymmh_avx512_regnum_p): Likewise for additional YMM raw registers added by AVX512. (i386_ymm_avx512_regnum_p): Likewise for additional YMM pseudo registers added by AVX512. (i386_xmm_avx512_regnum_p): Likewise for additional XMM registers added by AVX512. (i386_register_name): Add code to hide YMMH16-31 and ZMMH0-31. (i386_pseudo_register_name): Add ZMM pseudo registers. (i386_zmm_type): Construct and return vector registers type for ZMM registers. (i386_pseudo_register_type): Return appropriate type for YMM16-31, ZMM0-31 pseudo registers and K registers. (i386_pseudo_register_read_into_value): Add code to read K, ZMM and YMM16-31 registers from register cache. (i386_pseudo_register_write): Add code to write K, ZMM and YMM16-31 registers. (i386_register_reggroup_p): Add code to include/exclude AVX512 registers in/from respective register groups. (i386_validate_tdesc_p): Handle AVX512 feature, add AVX512 registers if feature is present in xcr0. (i386_gdbarch_init): Add code to initialize AVX512 feature variables in tdep structure, wire in pseudo registers and call initialize_tdesc_i386_avx512. * i386-tdep.h (struct gdbarch_tdep): Add AVX512 related variables. (i386_regnum): Add AVX512 registers. (I386_SSE_NUM_REGS): New define for number of SSE registers. (I386_AVX_NUM_REGS): Likewise for AVX registers. (I386_AVX512_NUM_REGS): Likewise for AVX512 registers. (I386_MAX_REGISTER_SIZE): Change to 64 bytes, ZMM registers are 512 bits wide. (i386_xmm_avx512_regnum_p): New prototype for register look up. (i386_ymm_avx512_regnum_p): Likewise. (i386_k_regnum_p): Likewise. (i386_zmm_regnum_p): Likewise. (i386_zmmh_regnum_p): Likewise. * i387-tdep.c : Update year in copyright notice. (xsave_ymm_avx512_offset): New table for YMM16-31 offsets in XSAVE buffer. (XSAVE_YMM_AVX512_ADDR): New macro. (xsave_xmm_avx512_offset): New table for XMM16-31 offsets in XSAVE buffer. (XSAVE_XMM_AVX512_ADDR): New macro. (xsave_avx512_k_offset): New table for K register offsets in XSAVE buffer. (XSAVE_AVX512_K_ADDR): New macro. (xsave_avx512_zmm_h_offset): New table for ZMM register offsets in XSAVE buffer. (XSAVE_AVX512_ZMM_H_ADDR): New macro. (i387_supply_xsave): Add code to supply AVX512 registers to XSAVE buffer. (i387_collect_xsave): Add code to collect AVX512 registers from XSAVE buffer. * i387-tdep.h (I387_NUM_XMM_AVX512_REGS): New define for number of XMM16-31 registers. (I387_NUM_K_REGS): New define for number of K registers. (I387_K0_REGNUM): New define for K0 register number. (I387_NUM_ZMMH_REGS): New define for number of ZMMH registers. (I387_ZMM0H_REGNUM): New define for ZMM0H register number. (I387_NUM_YMM_AVX512_REGS): New define for number of YMM16-31 registers. (I387_YMM16H_REGNUM): New define for YMM16H register number. (I387_XMM16_REGNUM): New define for XMM16 register number. (I387_YMM0_REGNUM): New define for YMM0 register number. (I387_KEND_REGNUM): New define for last K register number. (I387_ZMMENDH_REGNUM): New define for last ZMMH register number. (I387_YMMH_AVX512_END_REGNUM): New define for YMM31 register number. (I387_XMM_AVX512_END_REGNUM): New define for XMM31 register number. * common/i386-xstate.h: Add AVX 3.1 feature bits, mask and XSTATE size. * features/Makefile: Add AVX512 related files. * features/i386/32bit-avx512.xml: New file. * features/i386/64bit-avx512.xml: Likewise. * features/i386/amd64-avx512-linux.c: Likewise. * features/i386/amd64-avx512-linux.xml: Likewise. * features/i386/amd64-avx512.c: Likewise. * features/i386/amd64-avx512.xml: Likewise. * features/i386/i386-avx512-linux.c: Likewise. * features/i386/i386-avx512-linux.xml: Likewise. * features/i386/i386-avx512.c: Likewise. * features/i386/i386-avx512.xml: Likewise. * features/i386/x32-avx512-linux.c: Likewise. * features/i386/x32-avx512-linux.xml: Likewise. * features/i386/x32-avx512.c: Likewise. * features/i386/x32-avx512.xml: Likewise. * regformats/i386/amd64-avx512-linux.dat: New file. * regformats/i386/amd64-avx512.dat: Likewise. * regformats/i386/i386-avx512-linux.dat: Likewise. * regformats/i386/i386-avx512.dat: Likewise. * regformats/i386/x32-avx512-linux.dat: Likewise. * regformats/i386/x32-avx512.dat: Likewise. * NEWS: Add note about new support for AVX512. testsuite/ * Makefile.in (EXECUTABLES): Added i386-avx512. * gdb.arch/i386-avx512.c: New file. * gdb.arch/i386-avx512.exp: Likewise. gdbserver/ * Makefile.in: Added rules to handle new files i386-avx512.c i386-avx512-linux.c amd64-avx512.c amd64-avx512-linux.c x32-avx512.c x32-avx512-linux.c. * configure.srv (srv_i386_regobj): Add i386-avx512.o. (srv_i386_linux_regobj): Add i386-avx512-linux.o. (srv_amd64_regobj): Add amd64-avx512.o and x32-avx512.o. (srv_amd64_linux_regobj): Add amd64-avx512-linux.o and x32-avx512-linux.o. (srv_i386_32bit_xmlfiles): Add i386/32bit-avx512.xml. (srv_i386_64bit_xmlfiles): Add i386/64bit-avx512.xml. (srv_amd64_xmlfiles): Add i386/amd64-avx512.xml and i386/x32-avx512.xml. (srv_i386_linux_xmlfiles): Add i386/i386-avx512-linux.xml. (srv_amd64_linux_xmlfiles): Add i386/amd64-avx512-linux.xml and i386/x32-avx512-linux.xml. * i387-fp.c (num_avx512_k_registers): New constant for number of K registers. (num_avx512_zmmh_low_registers): New constant for number of lower ZMM registers (0-15). (num_avx512_zmmh_high_registers): New constant for number of higher ZMM registers (16-31). (num_avx512_ymmh_registers): New contant for number of higher YMM registers (ymm16-31 added by avx521 on x86_64). (num_avx512_xmm_registers): New constant for number of higher XMM registers (xmm16-31 added by AVX512 on x86_64). (struct i387_xsave): Add space for AVX512 registers. (i387_cache_to_xsave): Change raw buffer size to 64 characters. Add code to handle AVX512 registers. (i387_xsave_to_cache): Add code to handle AVX512 registers. * linux-x86-low.c (init_registers_amd64_avx512_linux): New prototypei from generated file. (tdesc_amd64_avx512_linux): Likewise. (init_registers_x32_avx512_linux): Likewise. (tdesc_x32_avx512_linux): Likewise. (init_registers_i386_avx512_linux): Likewise. (tdesc_i386_avx512_linux): Likewise. (x86_64_regmap): Add AVX512 registers. (x86_linux_read_description): Add code to handle AVX512 XSTATE mask. (initialize_low_arch): Add code to initialize AVX512 registers. doc/ * gdb.texinfo (i386 Features): Add description of AVX512 registers. Change-Id: Ifc4c08c76b85dbec18d02efdbe6182e851584438 Signed-off-by: Michael Sturm <michael.sturm@intel.com>
1269 lines
32 KiB
C
1269 lines
32 KiB
C
/* Native-dependent code for GNU/Linux x86-64.
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Copyright (C) 2001-2014 Free Software Foundation, Inc.
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Contributed by Jiri Smid, SuSE Labs.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "defs.h"
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#include "inferior.h"
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#include "gdbcore.h"
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#include "regcache.h"
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#include "regset.h"
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#include "linux-nat.h"
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#include "amd64-linux-tdep.h"
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#include "linux-btrace.h"
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#include "btrace.h"
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#include "gdb_assert.h"
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#include <string.h>
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#include "elf/common.h"
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#include <sys/uio.h>
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#include <sys/ptrace.h>
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#include <sys/debugreg.h>
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#include <sys/syscall.h>
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#include <sys/procfs.h>
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#include <sys/user.h>
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#include <asm/prctl.h>
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/* FIXME ezannoni-2003-07-09: we need <sys/reg.h> to be included after
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<asm/ptrace.h> because the latter redefines FS and GS for no apparent
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reason, and those definitions don't match the ones that libpthread_db
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uses, which come from <sys/reg.h>. */
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/* ezannoni-2003-07-09: I think this is fixed. The extraneous defs have
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been removed from ptrace.h in the kernel. However, better safe than
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sorry. */
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#include <asm/ptrace.h>
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#include <sys/reg.h>
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#include "gdb_proc_service.h"
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "amd64-tdep.h"
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#include "i386-linux-tdep.h"
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#include "amd64-nat.h"
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#include "i386-nat.h"
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#include "i386-xstate.h"
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#ifndef PTRACE_GETREGSET
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#define PTRACE_GETREGSET 0x4204
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#endif
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#ifndef PTRACE_SETREGSET
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#define PTRACE_SETREGSET 0x4205
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#endif
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/* Per-thread arch-specific data we want to keep. */
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struct arch_lwp_info
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{
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/* Non-zero if our copy differs from what's recorded in the thread. */
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int debug_registers_changed;
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};
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/* Does the current host support PTRACE_GETREGSET? */
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static int have_ptrace_getregset = -1;
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/* Mapping between the general-purpose registers in GNU/Linux x86-64
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`struct user' format and GDB's register cache layout for GNU/Linux
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i386.
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Note that most GNU/Linux x86-64 registers are 64-bit, while the
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GNU/Linux i386 registers are all 32-bit, but since we're
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little-endian we get away with that. */
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/* From <sys/reg.h> on GNU/Linux i386. */
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static int amd64_linux_gregset32_reg_offset[] =
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{
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RAX * 8, RCX * 8, /* %eax, %ecx */
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RDX * 8, RBX * 8, /* %edx, %ebx */
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RSP * 8, RBP * 8, /* %esp, %ebp */
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RSI * 8, RDI * 8, /* %esi, %edi */
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RIP * 8, EFLAGS * 8, /* %eip, %eflags */
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CS * 8, SS * 8, /* %cs, %ss */
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DS * 8, ES * 8, /* %ds, %es */
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FS * 8, GS * 8, /* %fs, %gs */
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, -1, -1, -1, -1,
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-1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
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-1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
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-1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
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-1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
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ORIG_RAX * 8 /* "orig_eax" */
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};
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/* Transfering the general-purpose registers between GDB, inferiors
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and core files. */
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/* Fill GDB's register cache with the general-purpose register values
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in *GREGSETP. */
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void
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supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
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{
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amd64_supply_native_gregset (regcache, gregsetp, -1);
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}
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/* Fill register REGNUM (if it is a general-purpose register) in
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*GREGSETP with the value in GDB's register cache. If REGNUM is -1,
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do this for all registers. */
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void
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fill_gregset (const struct regcache *regcache,
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elf_gregset_t *gregsetp, int regnum)
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{
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amd64_collect_native_gregset (regcache, gregsetp, regnum);
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}
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/* Transfering floating-point registers between GDB, inferiors and cores. */
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/* Fill GDB's register cache with the floating-point and SSE register
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values in *FPREGSETP. */
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void
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supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
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{
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amd64_supply_fxsave (regcache, -1, fpregsetp);
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}
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/* Fill register REGNUM (if it is a floating-point or SSE register) in
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*FPREGSETP with the value in GDB's register cache. If REGNUM is
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-1, do this for all registers. */
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void
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fill_fpregset (const struct regcache *regcache,
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elf_fpregset_t *fpregsetp, int regnum)
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{
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amd64_collect_fxsave (regcache, regnum, fpregsetp);
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}
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/* Transferring arbitrary registers between GDB and inferior. */
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/* Fetch register REGNUM from the child process. If REGNUM is -1, do
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this for all registers (including the floating point and SSE
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registers). */
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static void
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amd64_linux_fetch_inferior_registers (struct target_ops *ops,
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struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int tid;
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/* GNU/Linux LWP ID's are process ID's. */
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tid = ptid_get_lwp (inferior_ptid);
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if (tid == 0)
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tid = ptid_get_pid (inferior_ptid); /* Not a threaded program. */
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if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't get registers"));
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amd64_supply_native_gregset (regcache, ®s, -1);
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if (regnum != -1)
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return;
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}
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if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_fpregset_t fpregs;
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if (have_ptrace_getregset)
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{
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char xstateregs[I386_XSTATE_MAX_SIZE];
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struct iovec iov;
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iov.iov_base = xstateregs;
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iov.iov_len = sizeof (xstateregs);
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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amd64_supply_xsave (regcache, -1, xstateregs);
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}
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else
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{
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if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
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perror_with_name (_("Couldn't get floating point status"));
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amd64_supply_fxsave (regcache, -1, &fpregs);
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}
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}
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}
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/* Store register REGNUM back into the child process. If REGNUM is
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-1, do this for all registers (including the floating-point and SSE
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registers). */
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static void
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amd64_linux_store_inferior_registers (struct target_ops *ops,
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struct regcache *regcache, int regnum)
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{
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struct gdbarch *gdbarch = get_regcache_arch (regcache);
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int tid;
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/* GNU/Linux LWP ID's are process ID's. */
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tid = ptid_get_lwp (inferior_ptid);
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if (tid == 0)
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tid = ptid_get_pid (inferior_ptid); /* Not a threaded program. */
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if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_gregset_t regs;
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if (ptrace (PTRACE_GETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't get registers"));
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amd64_collect_native_gregset (regcache, ®s, regnum);
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if (ptrace (PTRACE_SETREGS, tid, 0, (long) ®s) < 0)
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perror_with_name (_("Couldn't write registers"));
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if (regnum != -1)
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return;
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}
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if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
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{
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elf_fpregset_t fpregs;
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if (have_ptrace_getregset)
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{
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char xstateregs[I386_XSTATE_MAX_SIZE];
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struct iovec iov;
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iov.iov_base = xstateregs;
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iov.iov_len = sizeof (xstateregs);
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if (ptrace (PTRACE_GETREGSET, tid,
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(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
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perror_with_name (_("Couldn't get extended state status"));
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|
||
amd64_collect_xsave (regcache, regnum, xstateregs, 0);
|
||
|
||
if (ptrace (PTRACE_SETREGSET, tid,
|
||
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
|
||
perror_with_name (_("Couldn't write extended state status"));
|
||
}
|
||
else
|
||
{
|
||
if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
|
||
perror_with_name (_("Couldn't get floating point status"));
|
||
|
||
amd64_collect_fxsave (regcache, regnum, &fpregs);
|
||
|
||
if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
|
||
perror_with_name (_("Couldn't write floating point status"));
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Support for debug registers. */
|
||
|
||
static unsigned long
|
||
amd64_linux_dr_get (ptid_t ptid, int regnum)
|
||
{
|
||
int tid;
|
||
unsigned long value;
|
||
|
||
tid = ptid_get_lwp (ptid);
|
||
if (tid == 0)
|
||
tid = ptid_get_pid (ptid);
|
||
|
||
errno = 0;
|
||
value = ptrace (PTRACE_PEEKUSER, tid,
|
||
offsetof (struct user, u_debugreg[regnum]), 0);
|
||
if (errno != 0)
|
||
perror_with_name (_("Couldn't read debug register"));
|
||
|
||
return value;
|
||
}
|
||
|
||
/* Set debug register REGNUM to VALUE in only the one LWP of PTID. */
|
||
|
||
static void
|
||
amd64_linux_dr_set (ptid_t ptid, int regnum, unsigned long value)
|
||
{
|
||
int tid;
|
||
|
||
tid = ptid_get_lwp (ptid);
|
||
if (tid == 0)
|
||
tid = ptid_get_pid (ptid);
|
||
|
||
errno = 0;
|
||
ptrace (PTRACE_POKEUSER, tid,
|
||
offsetof (struct user, u_debugreg[regnum]), value);
|
||
if (errno != 0)
|
||
perror_with_name (_("Couldn't write debug register"));
|
||
}
|
||
|
||
/* Return the inferior's debug register REGNUM. */
|
||
|
||
static CORE_ADDR
|
||
amd64_linux_dr_get_addr (int regnum)
|
||
{
|
||
/* DR6 and DR7 are retrieved with some other way. */
|
||
gdb_assert (DR_FIRSTADDR <= regnum && regnum <= DR_LASTADDR);
|
||
|
||
return amd64_linux_dr_get (inferior_ptid, regnum);
|
||
}
|
||
|
||
/* Return the inferior's DR7 debug control register. */
|
||
|
||
static unsigned long
|
||
amd64_linux_dr_get_control (void)
|
||
{
|
||
return amd64_linux_dr_get (inferior_ptid, DR_CONTROL);
|
||
}
|
||
|
||
/* Get DR_STATUS from only the one LWP of INFERIOR_PTID. */
|
||
|
||
static unsigned long
|
||
amd64_linux_dr_get_status (void)
|
||
{
|
||
return amd64_linux_dr_get (inferior_ptid, DR_STATUS);
|
||
}
|
||
|
||
/* Callback for iterate_over_lwps. Update the debug registers of
|
||
LWP. */
|
||
|
||
static int
|
||
update_debug_registers_callback (struct lwp_info *lwp, void *arg)
|
||
{
|
||
if (lwp->arch_private == NULL)
|
||
lwp->arch_private = XCNEW (struct arch_lwp_info);
|
||
|
||
/* The actual update is done later just before resuming the lwp, we
|
||
just mark that the registers need updating. */
|
||
lwp->arch_private->debug_registers_changed = 1;
|
||
|
||
/* If the lwp isn't stopped, force it to momentarily pause, so we
|
||
can update its debug registers. */
|
||
if (!lwp->stopped)
|
||
linux_stop_lwp (lwp);
|
||
|
||
/* Continue the iteration. */
|
||
return 0;
|
||
}
|
||
|
||
/* Set DR_CONTROL to CONTROL in all LWPs of the current inferior. */
|
||
|
||
static void
|
||
amd64_linux_dr_set_control (unsigned long control)
|
||
{
|
||
ptid_t pid_ptid = pid_to_ptid (ptid_get_pid (inferior_ptid));
|
||
|
||
iterate_over_lwps (pid_ptid, update_debug_registers_callback, NULL);
|
||
}
|
||
|
||
/* Set address REGNUM (zero based) to ADDR in all LWPs of the current
|
||
inferior. */
|
||
|
||
static void
|
||
amd64_linux_dr_set_addr (int regnum, CORE_ADDR addr)
|
||
{
|
||
ptid_t pid_ptid = pid_to_ptid (ptid_get_pid (inferior_ptid));
|
||
|
||
gdb_assert (regnum >= 0 && regnum <= DR_LASTADDR - DR_FIRSTADDR);
|
||
|
||
iterate_over_lwps (pid_ptid, update_debug_registers_callback, NULL);
|
||
}
|
||
|
||
/* Called when resuming a thread.
|
||
If the debug regs have changed, update the thread's copies. */
|
||
|
||
static void
|
||
amd64_linux_prepare_to_resume (struct lwp_info *lwp)
|
||
{
|
||
int clear_status = 0;
|
||
|
||
/* NULL means this is the main thread still going through the shell,
|
||
or, no watchpoint has been set yet. In that case, there's
|
||
nothing to do. */
|
||
if (lwp->arch_private == NULL)
|
||
return;
|
||
|
||
if (lwp->arch_private->debug_registers_changed)
|
||
{
|
||
struct i386_debug_reg_state *state
|
||
= i386_debug_reg_state (ptid_get_pid (lwp->ptid));
|
||
int i;
|
||
|
||
/* On Linux kernel before 2.6.33 commit
|
||
72f674d203cd230426437cdcf7dd6f681dad8b0d
|
||
if you enable a breakpoint by the DR_CONTROL bits you need to have
|
||
already written the corresponding DR_FIRSTADDR...DR_LASTADDR registers.
|
||
|
||
Ensure DR_CONTROL gets written as the very last register here. */
|
||
|
||
for (i = DR_FIRSTADDR; i <= DR_LASTADDR; i++)
|
||
if (state->dr_ref_count[i] > 0)
|
||
{
|
||
amd64_linux_dr_set (lwp->ptid, i, state->dr_mirror[i]);
|
||
|
||
/* If we're setting a watchpoint, any change the inferior
|
||
had done itself to the debug registers needs to be
|
||
discarded, otherwise, i386_stopped_data_address can get
|
||
confused. */
|
||
clear_status = 1;
|
||
}
|
||
|
||
amd64_linux_dr_set (lwp->ptid, DR_CONTROL, state->dr_control_mirror);
|
||
|
||
lwp->arch_private->debug_registers_changed = 0;
|
||
}
|
||
|
||
if (clear_status || lwp->stopped_by_watchpoint)
|
||
amd64_linux_dr_set (lwp->ptid, DR_STATUS, 0);
|
||
}
|
||
|
||
static void
|
||
amd64_linux_new_thread (struct lwp_info *lp)
|
||
{
|
||
struct arch_lwp_info *info = XCNEW (struct arch_lwp_info);
|
||
|
||
info->debug_registers_changed = 1;
|
||
|
||
lp->arch_private = info;
|
||
}
|
||
|
||
/* linux_nat_new_fork hook. */
|
||
|
||
static void
|
||
amd64_linux_new_fork (struct lwp_info *parent, pid_t child_pid)
|
||
{
|
||
pid_t parent_pid;
|
||
struct i386_debug_reg_state *parent_state;
|
||
struct i386_debug_reg_state *child_state;
|
||
|
||
/* NULL means no watchpoint has ever been set in the parent. In
|
||
that case, there's nothing to do. */
|
||
if (parent->arch_private == NULL)
|
||
return;
|
||
|
||
/* Linux kernel before 2.6.33 commit
|
||
72f674d203cd230426437cdcf7dd6f681dad8b0d
|
||
will inherit hardware debug registers from parent
|
||
on fork/vfork/clone. Newer Linux kernels create such tasks with
|
||
zeroed debug registers.
|
||
|
||
GDB core assumes the child inherits the watchpoints/hw
|
||
breakpoints of the parent, and will remove them all from the
|
||
forked off process. Copy the debug registers mirrors into the
|
||
new process so that all breakpoints and watchpoints can be
|
||
removed together. The debug registers mirror will become zeroed
|
||
in the end before detaching the forked off process, thus making
|
||
this compatible with older Linux kernels too. */
|
||
|
||
parent_pid = ptid_get_pid (parent->ptid);
|
||
parent_state = i386_debug_reg_state (parent_pid);
|
||
child_state = i386_debug_reg_state (child_pid);
|
||
*child_state = *parent_state;
|
||
}
|
||
|
||
|
||
|
||
/* This function is called by libthread_db as part of its handling of
|
||
a request for a thread's local storage address. */
|
||
|
||
ps_err_e
|
||
ps_get_thread_area (const struct ps_prochandle *ph,
|
||
lwpid_t lwpid, int idx, void **base)
|
||
{
|
||
if (gdbarch_bfd_arch_info (target_gdbarch ())->bits_per_word == 32)
|
||
{
|
||
/* The full structure is found in <asm-i386/ldt.h>. The second
|
||
integer is the LDT's base_address and that is used to locate
|
||
the thread's local storage. See i386-linux-nat.c more
|
||
info. */
|
||
unsigned int desc[4];
|
||
|
||
/* This code assumes that "int" is 32 bits and that
|
||
GET_THREAD_AREA returns no more than 4 int values. */
|
||
gdb_assert (sizeof (int) == 4);
|
||
#ifndef PTRACE_GET_THREAD_AREA
|
||
#define PTRACE_GET_THREAD_AREA 25
|
||
#endif
|
||
if (ptrace (PTRACE_GET_THREAD_AREA,
|
||
lwpid, (void *) (long) idx, (unsigned long) &desc) < 0)
|
||
return PS_ERR;
|
||
|
||
/* Extend the value to 64 bits. Here it's assumed that a "long"
|
||
and a "void *" are the same. */
|
||
(*base) = (void *) (long) desc[1];
|
||
return PS_OK;
|
||
}
|
||
else
|
||
{
|
||
/* This definition comes from prctl.h, but some kernels may not
|
||
have it. */
|
||
#ifndef PTRACE_ARCH_PRCTL
|
||
#define PTRACE_ARCH_PRCTL 30
|
||
#endif
|
||
/* FIXME: ezannoni-2003-07-09 see comment above about include
|
||
file order. We could be getting bogus values for these two. */
|
||
gdb_assert (FS < ELF_NGREG);
|
||
gdb_assert (GS < ELF_NGREG);
|
||
switch (idx)
|
||
{
|
||
case FS:
|
||
#ifdef HAVE_STRUCT_USER_REGS_STRUCT_FS_BASE
|
||
{
|
||
/* PTRACE_ARCH_PRCTL is obsolete since 2.6.25, where the
|
||
fs_base and gs_base fields of user_regs_struct can be
|
||
used directly. */
|
||
unsigned long fs;
|
||
errno = 0;
|
||
fs = ptrace (PTRACE_PEEKUSER, lwpid,
|
||
offsetof (struct user_regs_struct, fs_base), 0);
|
||
if (errno == 0)
|
||
{
|
||
*base = (void *) fs;
|
||
return PS_OK;
|
||
}
|
||
}
|
||
#endif
|
||
if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_FS) == 0)
|
||
return PS_OK;
|
||
break;
|
||
case GS:
|
||
#ifdef HAVE_STRUCT_USER_REGS_STRUCT_GS_BASE
|
||
{
|
||
unsigned long gs;
|
||
errno = 0;
|
||
gs = ptrace (PTRACE_PEEKUSER, lwpid,
|
||
offsetof (struct user_regs_struct, gs_base), 0);
|
||
if (errno == 0)
|
||
{
|
||
*base = (void *) gs;
|
||
return PS_OK;
|
||
}
|
||
}
|
||
#endif
|
||
if (ptrace (PTRACE_ARCH_PRCTL, lwpid, base, ARCH_GET_GS) == 0)
|
||
return PS_OK;
|
||
break;
|
||
default: /* Should not happen. */
|
||
return PS_BADADDR;
|
||
}
|
||
}
|
||
return PS_ERR; /* ptrace failed. */
|
||
}
|
||
|
||
|
||
static void (*super_post_startup_inferior) (struct target_ops *self,
|
||
ptid_t ptid);
|
||
|
||
static void
|
||
amd64_linux_child_post_startup_inferior (struct target_ops *self, ptid_t ptid)
|
||
{
|
||
i386_cleanup_dregs ();
|
||
super_post_startup_inferior (self, ptid);
|
||
}
|
||
|
||
|
||
/* When GDB is built as a 64-bit application on linux, the
|
||
PTRACE_GETSIGINFO data is always presented in 64-bit layout. Since
|
||
debugging a 32-bit inferior with a 64-bit GDB should look the same
|
||
as debugging it with a 32-bit GDB, we do the 32-bit <-> 64-bit
|
||
conversion in-place ourselves. */
|
||
|
||
/* These types below (compat_*) define a siginfo type that is layout
|
||
compatible with the siginfo type exported by the 32-bit userspace
|
||
support. */
|
||
|
||
typedef int compat_int_t;
|
||
typedef unsigned int compat_uptr_t;
|
||
|
||
typedef int compat_time_t;
|
||
typedef int compat_timer_t;
|
||
typedef int compat_clock_t;
|
||
|
||
struct compat_timeval
|
||
{
|
||
compat_time_t tv_sec;
|
||
int tv_usec;
|
||
};
|
||
|
||
typedef union compat_sigval
|
||
{
|
||
compat_int_t sival_int;
|
||
compat_uptr_t sival_ptr;
|
||
} compat_sigval_t;
|
||
|
||
typedef struct compat_siginfo
|
||
{
|
||
int si_signo;
|
||
int si_errno;
|
||
int si_code;
|
||
|
||
union
|
||
{
|
||
int _pad[((128 / sizeof (int)) - 3)];
|
||
|
||
/* kill() */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
} _kill;
|
||
|
||
/* POSIX.1b timers */
|
||
struct
|
||
{
|
||
compat_timer_t _tid;
|
||
int _overrun;
|
||
compat_sigval_t _sigval;
|
||
} _timer;
|
||
|
||
/* POSIX.1b signals */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
compat_sigval_t _sigval;
|
||
} _rt;
|
||
|
||
/* SIGCHLD */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
int _status;
|
||
compat_clock_t _utime;
|
||
compat_clock_t _stime;
|
||
} _sigchld;
|
||
|
||
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
||
struct
|
||
{
|
||
unsigned int _addr;
|
||
} _sigfault;
|
||
|
||
/* SIGPOLL */
|
||
struct
|
||
{
|
||
int _band;
|
||
int _fd;
|
||
} _sigpoll;
|
||
} _sifields;
|
||
} compat_siginfo_t;
|
||
|
||
/* For x32, clock_t in _sigchld is 64bit aligned at 4 bytes. */
|
||
typedef struct compat_x32_clock
|
||
{
|
||
int lower;
|
||
int upper;
|
||
} compat_x32_clock_t;
|
||
|
||
typedef struct compat_x32_siginfo
|
||
{
|
||
int si_signo;
|
||
int si_errno;
|
||
int si_code;
|
||
|
||
union
|
||
{
|
||
int _pad[((128 / sizeof (int)) - 3)];
|
||
|
||
/* kill() */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
} _kill;
|
||
|
||
/* POSIX.1b timers */
|
||
struct
|
||
{
|
||
compat_timer_t _tid;
|
||
int _overrun;
|
||
compat_sigval_t _sigval;
|
||
} _timer;
|
||
|
||
/* POSIX.1b signals */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
compat_sigval_t _sigval;
|
||
} _rt;
|
||
|
||
/* SIGCHLD */
|
||
struct
|
||
{
|
||
unsigned int _pid;
|
||
unsigned int _uid;
|
||
int _status;
|
||
compat_x32_clock_t _utime;
|
||
compat_x32_clock_t _stime;
|
||
} _sigchld;
|
||
|
||
/* SIGILL, SIGFPE, SIGSEGV, SIGBUS */
|
||
struct
|
||
{
|
||
unsigned int _addr;
|
||
} _sigfault;
|
||
|
||
/* SIGPOLL */
|
||
struct
|
||
{
|
||
int _band;
|
||
int _fd;
|
||
} _sigpoll;
|
||
} _sifields;
|
||
} compat_x32_siginfo_t;
|
||
|
||
#define cpt_si_pid _sifields._kill._pid
|
||
#define cpt_si_uid _sifields._kill._uid
|
||
#define cpt_si_timerid _sifields._timer._tid
|
||
#define cpt_si_overrun _sifields._timer._overrun
|
||
#define cpt_si_status _sifields._sigchld._status
|
||
#define cpt_si_utime _sifields._sigchld._utime
|
||
#define cpt_si_stime _sifields._sigchld._stime
|
||
#define cpt_si_ptr _sifields._rt._sigval.sival_ptr
|
||
#define cpt_si_addr _sifields._sigfault._addr
|
||
#define cpt_si_band _sifields._sigpoll._band
|
||
#define cpt_si_fd _sifields._sigpoll._fd
|
||
|
||
/* glibc at least up to 2.3.2 doesn't have si_timerid, si_overrun.
|
||
In their place is si_timer1,si_timer2. */
|
||
#ifndef si_timerid
|
||
#define si_timerid si_timer1
|
||
#endif
|
||
#ifndef si_overrun
|
||
#define si_overrun si_timer2
|
||
#endif
|
||
|
||
static void
|
||
compat_siginfo_from_siginfo (compat_siginfo_t *to, siginfo_t *from)
|
||
{
|
||
memset (to, 0, sizeof (*to));
|
||
|
||
to->si_signo = from->si_signo;
|
||
to->si_errno = from->si_errno;
|
||
to->si_code = from->si_code;
|
||
|
||
if (to->si_code == SI_TIMER)
|
||
{
|
||
to->cpt_si_timerid = from->si_timerid;
|
||
to->cpt_si_overrun = from->si_overrun;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
}
|
||
else if (to->si_code == SI_USER)
|
||
{
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
}
|
||
else if (to->si_code < 0)
|
||
{
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
}
|
||
else
|
||
{
|
||
switch (to->si_signo)
|
||
{
|
||
case SIGCHLD:
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_status = from->si_status;
|
||
to->cpt_si_utime = from->si_utime;
|
||
to->cpt_si_stime = from->si_stime;
|
||
break;
|
||
case SIGILL:
|
||
case SIGFPE:
|
||
case SIGSEGV:
|
||
case SIGBUS:
|
||
to->cpt_si_addr = (intptr_t) from->si_addr;
|
||
break;
|
||
case SIGPOLL:
|
||
to->cpt_si_band = from->si_band;
|
||
to->cpt_si_fd = from->si_fd;
|
||
break;
|
||
default:
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
static void
|
||
siginfo_from_compat_siginfo (siginfo_t *to, compat_siginfo_t *from)
|
||
{
|
||
memset (to, 0, sizeof (*to));
|
||
|
||
to->si_signo = from->si_signo;
|
||
to->si_errno = from->si_errno;
|
||
to->si_code = from->si_code;
|
||
|
||
if (to->si_code == SI_TIMER)
|
||
{
|
||
to->si_timerid = from->cpt_si_timerid;
|
||
to->si_overrun = from->cpt_si_overrun;
|
||
to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
|
||
}
|
||
else if (to->si_code == SI_USER)
|
||
{
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
}
|
||
if (to->si_code < 0)
|
||
{
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
|
||
}
|
||
else
|
||
{
|
||
switch (to->si_signo)
|
||
{
|
||
case SIGCHLD:
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_status = from->cpt_si_status;
|
||
to->si_utime = from->cpt_si_utime;
|
||
to->si_stime = from->cpt_si_stime;
|
||
break;
|
||
case SIGILL:
|
||
case SIGFPE:
|
||
case SIGSEGV:
|
||
case SIGBUS:
|
||
to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
|
||
break;
|
||
case SIGPOLL:
|
||
to->si_band = from->cpt_si_band;
|
||
to->si_fd = from->cpt_si_fd;
|
||
break;
|
||
default:
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
static void
|
||
compat_x32_siginfo_from_siginfo (compat_x32_siginfo_t *to,
|
||
siginfo_t *from)
|
||
{
|
||
memset (to, 0, sizeof (*to));
|
||
|
||
to->si_signo = from->si_signo;
|
||
to->si_errno = from->si_errno;
|
||
to->si_code = from->si_code;
|
||
|
||
if (to->si_code == SI_TIMER)
|
||
{
|
||
to->cpt_si_timerid = from->si_timerid;
|
||
to->cpt_si_overrun = from->si_overrun;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
}
|
||
else if (to->si_code == SI_USER)
|
||
{
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
}
|
||
else if (to->si_code < 0)
|
||
{
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
}
|
||
else
|
||
{
|
||
switch (to->si_signo)
|
||
{
|
||
case SIGCHLD:
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_status = from->si_status;
|
||
memcpy (&to->cpt_si_utime, &from->si_utime,
|
||
sizeof (to->cpt_si_utime));
|
||
memcpy (&to->cpt_si_stime, &from->si_stime,
|
||
sizeof (to->cpt_si_stime));
|
||
break;
|
||
case SIGILL:
|
||
case SIGFPE:
|
||
case SIGSEGV:
|
||
case SIGBUS:
|
||
to->cpt_si_addr = (intptr_t) from->si_addr;
|
||
break;
|
||
case SIGPOLL:
|
||
to->cpt_si_band = from->si_band;
|
||
to->cpt_si_fd = from->si_fd;
|
||
break;
|
||
default:
|
||
to->cpt_si_pid = from->si_pid;
|
||
to->cpt_si_uid = from->si_uid;
|
||
to->cpt_si_ptr = (intptr_t) from->si_ptr;
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
static void
|
||
siginfo_from_compat_x32_siginfo (siginfo_t *to,
|
||
compat_x32_siginfo_t *from)
|
||
{
|
||
memset (to, 0, sizeof (*to));
|
||
|
||
to->si_signo = from->si_signo;
|
||
to->si_errno = from->si_errno;
|
||
to->si_code = from->si_code;
|
||
|
||
if (to->si_code == SI_TIMER)
|
||
{
|
||
to->si_timerid = from->cpt_si_timerid;
|
||
to->si_overrun = from->cpt_si_overrun;
|
||
to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
|
||
}
|
||
else if (to->si_code == SI_USER)
|
||
{
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
}
|
||
if (to->si_code < 0)
|
||
{
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_ptr = (void *) (intptr_t) from->cpt_si_ptr;
|
||
}
|
||
else
|
||
{
|
||
switch (to->si_signo)
|
||
{
|
||
case SIGCHLD:
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_status = from->cpt_si_status;
|
||
memcpy (&to->si_utime, &from->cpt_si_utime,
|
||
sizeof (to->si_utime));
|
||
memcpy (&to->si_stime, &from->cpt_si_stime,
|
||
sizeof (to->si_stime));
|
||
break;
|
||
case SIGILL:
|
||
case SIGFPE:
|
||
case SIGSEGV:
|
||
case SIGBUS:
|
||
to->si_addr = (void *) (intptr_t) from->cpt_si_addr;
|
||
break;
|
||
case SIGPOLL:
|
||
to->si_band = from->cpt_si_band;
|
||
to->si_fd = from->cpt_si_fd;
|
||
break;
|
||
default:
|
||
to->si_pid = from->cpt_si_pid;
|
||
to->si_uid = from->cpt_si_uid;
|
||
to->si_ptr = (void* ) (intptr_t) from->cpt_si_ptr;
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
/* Convert a native/host siginfo object, into/from the siginfo in the
|
||
layout of the inferiors' architecture. Returns true if any
|
||
conversion was done; false otherwise. If DIRECTION is 1, then copy
|
||
from INF to NATIVE. If DIRECTION is 0, copy from NATIVE to
|
||
INF. */
|
||
|
||
static int
|
||
amd64_linux_siginfo_fixup (siginfo_t *native, gdb_byte *inf, int direction)
|
||
{
|
||
struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
|
||
|
||
/* Is the inferior 32-bit? If so, then do fixup the siginfo
|
||
object. */
|
||
if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
|
||
{
|
||
gdb_assert (sizeof (siginfo_t) == sizeof (compat_siginfo_t));
|
||
|
||
if (direction == 0)
|
||
compat_siginfo_from_siginfo ((struct compat_siginfo *) inf, native);
|
||
else
|
||
siginfo_from_compat_siginfo (native, (struct compat_siginfo *) inf);
|
||
|
||
return 1;
|
||
}
|
||
/* No fixup for native x32 GDB. */
|
||
else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
|
||
{
|
||
gdb_assert (sizeof (siginfo_t) == sizeof (compat_x32_siginfo_t));
|
||
|
||
if (direction == 0)
|
||
compat_x32_siginfo_from_siginfo ((struct compat_x32_siginfo *) inf,
|
||
native);
|
||
else
|
||
siginfo_from_compat_x32_siginfo (native,
|
||
(struct compat_x32_siginfo *) inf);
|
||
|
||
return 1;
|
||
}
|
||
else
|
||
return 0;
|
||
}
|
||
|
||
/* Get Linux/x86 target description from running target.
|
||
|
||
Value of CS segment register:
|
||
1. 64bit process: 0x33.
|
||
2. 32bit process: 0x23.
|
||
|
||
Value of DS segment register:
|
||
1. LP64 process: 0x0.
|
||
2. X32 process: 0x2b.
|
||
*/
|
||
|
||
#define AMD64_LINUX_USER64_CS 0x33
|
||
#define AMD64_LINUX_X32_DS 0x2b
|
||
|
||
static const struct target_desc *
|
||
amd64_linux_read_description (struct target_ops *ops)
|
||
{
|
||
unsigned long cs;
|
||
unsigned long ds;
|
||
int tid;
|
||
int is_64bit;
|
||
int is_x32;
|
||
static uint64_t xcr0;
|
||
|
||
/* GNU/Linux LWP ID's are process ID's. */
|
||
tid = ptid_get_lwp (inferior_ptid);
|
||
if (tid == 0)
|
||
tid = ptid_get_pid (inferior_ptid); /* Not a threaded program. */
|
||
|
||
/* Get CS register. */
|
||
errno = 0;
|
||
cs = ptrace (PTRACE_PEEKUSER, tid,
|
||
offsetof (struct user_regs_struct, cs), 0);
|
||
if (errno != 0)
|
||
perror_with_name (_("Couldn't get CS register"));
|
||
|
||
is_64bit = cs == AMD64_LINUX_USER64_CS;
|
||
|
||
/* Get DS register. */
|
||
errno = 0;
|
||
ds = ptrace (PTRACE_PEEKUSER, tid,
|
||
offsetof (struct user_regs_struct, ds), 0);
|
||
if (errno != 0)
|
||
perror_with_name (_("Couldn't get DS register"));
|
||
|
||
is_x32 = ds == AMD64_LINUX_X32_DS;
|
||
|
||
if (sizeof (void *) == 4 && is_64bit && !is_x32)
|
||
error (_("Can't debug 64-bit process with 32-bit GDB"));
|
||
|
||
if (have_ptrace_getregset == -1)
|
||
{
|
||
uint64_t xstateregs[(I386_XSTATE_SSE_SIZE / sizeof (uint64_t))];
|
||
struct iovec iov;
|
||
|
||
iov.iov_base = xstateregs;
|
||
iov.iov_len = sizeof (xstateregs);
|
||
|
||
/* Check if PTRACE_GETREGSET works. */
|
||
if (ptrace (PTRACE_GETREGSET, tid,
|
||
(unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
|
||
have_ptrace_getregset = 0;
|
||
else
|
||
{
|
||
have_ptrace_getregset = 1;
|
||
|
||
/* Get XCR0 from XSAVE extended state. */
|
||
xcr0 = xstateregs[(I386_LINUX_XSAVE_XCR0_OFFSET
|
||
/ sizeof (uint64_t))];
|
||
}
|
||
}
|
||
|
||
/* Check the native XCR0 only if PTRACE_GETREGSET is available. */
|
||
if (have_ptrace_getregset && (xcr0 & I386_XSTATE_ALL_MASK))
|
||
{
|
||
switch (xcr0 & I386_XSTATE_ALL_MASK)
|
||
{
|
||
case I386_XSTATE_MPX_AVX512_MASK:
|
||
case I386_XSTATE_AVX512_MASK:
|
||
if (is_64bit)
|
||
{
|
||
if (is_x32)
|
||
return tdesc_x32_avx512_linux;
|
||
else
|
||
return tdesc_amd64_avx512_linux;
|
||
}
|
||
else
|
||
return tdesc_i386_avx512_linux;
|
||
case I386_XSTATE_MPX_MASK:
|
||
if (is_64bit)
|
||
{
|
||
if (is_x32)
|
||
return tdesc_x32_avx_linux; /* No MPX on x32 using AVX. */
|
||
else
|
||
return tdesc_amd64_mpx_linux;
|
||
}
|
||
else
|
||
return tdesc_i386_mpx_linux;
|
||
case I386_XSTATE_AVX_MASK:
|
||
if (is_64bit)
|
||
{
|
||
if (is_x32)
|
||
return tdesc_x32_avx_linux;
|
||
else
|
||
return tdesc_amd64_avx_linux;
|
||
}
|
||
else
|
||
return tdesc_i386_avx_linux;
|
||
default:
|
||
if (is_64bit)
|
||
{
|
||
if (is_x32)
|
||
return tdesc_x32_linux;
|
||
else
|
||
return tdesc_amd64_linux;
|
||
}
|
||
else
|
||
return tdesc_i386_linux;
|
||
}
|
||
}
|
||
else
|
||
{
|
||
if (is_64bit)
|
||
{
|
||
if (is_x32)
|
||
return tdesc_x32_linux;
|
||
else
|
||
return tdesc_amd64_linux;
|
||
}
|
||
else
|
||
return tdesc_i386_linux;
|
||
}
|
||
}
|
||
|
||
/* Enable branch tracing. */
|
||
|
||
static struct btrace_target_info *
|
||
amd64_linux_enable_btrace (struct target_ops *self, ptid_t ptid)
|
||
{
|
||
struct btrace_target_info *tinfo;
|
||
struct gdbarch *gdbarch;
|
||
|
||
errno = 0;
|
||
tinfo = linux_enable_btrace (ptid);
|
||
|
||
if (tinfo == NULL)
|
||
error (_("Could not enable branch tracing for %s: %s."),
|
||
target_pid_to_str (ptid), safe_strerror (errno));
|
||
|
||
/* Fill in the size of a pointer in bits. */
|
||
gdbarch = target_thread_architecture (ptid);
|
||
tinfo->ptr_bits = gdbarch_ptr_bit (gdbarch);
|
||
|
||
return tinfo;
|
||
}
|
||
|
||
/* Disable branch tracing. */
|
||
|
||
static void
|
||
amd64_linux_disable_btrace (struct target_ops *self,
|
||
struct btrace_target_info *tinfo)
|
||
{
|
||
enum btrace_error errcode = linux_disable_btrace (tinfo);
|
||
|
||
if (errcode != BTRACE_ERR_NONE)
|
||
error (_("Could not disable branch tracing."));
|
||
}
|
||
|
||
/* Teardown branch tracing. */
|
||
|
||
static void
|
||
amd64_linux_teardown_btrace (struct target_ops *self,
|
||
struct btrace_target_info *tinfo)
|
||
{
|
||
/* Ignore errors. */
|
||
linux_disable_btrace (tinfo);
|
||
}
|
||
|
||
static enum btrace_error
|
||
amd64_linux_read_btrace (struct target_ops *self,
|
||
VEC (btrace_block_s) **data,
|
||
struct btrace_target_info *btinfo,
|
||
enum btrace_read_type type)
|
||
{
|
||
return linux_read_btrace (data, btinfo, type);
|
||
}
|
||
|
||
/* Provide a prototype to silence -Wmissing-prototypes. */
|
||
void _initialize_amd64_linux_nat (void);
|
||
|
||
void
|
||
_initialize_amd64_linux_nat (void)
|
||
{
|
||
struct target_ops *t;
|
||
|
||
amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
|
||
amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
|
||
amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
|
||
amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
|
||
|
||
gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
|
||
== amd64_native_gregset32_num_regs);
|
||
|
||
/* Fill in the generic GNU/Linux methods. */
|
||
t = linux_target ();
|
||
|
||
i386_use_watchpoints (t);
|
||
|
||
i386_dr_low.set_control = amd64_linux_dr_set_control;
|
||
i386_dr_low.set_addr = amd64_linux_dr_set_addr;
|
||
i386_dr_low.get_addr = amd64_linux_dr_get_addr;
|
||
i386_dr_low.get_status = amd64_linux_dr_get_status;
|
||
i386_dr_low.get_control = amd64_linux_dr_get_control;
|
||
i386_set_debug_register_length (8);
|
||
|
||
/* Override the GNU/Linux inferior startup hook. */
|
||
super_post_startup_inferior = t->to_post_startup_inferior;
|
||
t->to_post_startup_inferior = amd64_linux_child_post_startup_inferior;
|
||
|
||
/* Add our register access methods. */
|
||
t->to_fetch_registers = amd64_linux_fetch_inferior_registers;
|
||
t->to_store_registers = amd64_linux_store_inferior_registers;
|
||
|
||
t->to_read_description = amd64_linux_read_description;
|
||
|
||
/* Add btrace methods. */
|
||
t->to_supports_btrace = linux_supports_btrace;
|
||
t->to_enable_btrace = amd64_linux_enable_btrace;
|
||
t->to_disable_btrace = amd64_linux_disable_btrace;
|
||
t->to_teardown_btrace = amd64_linux_teardown_btrace;
|
||
t->to_read_btrace = amd64_linux_read_btrace;
|
||
|
||
/* Register the target. */
|
||
linux_nat_add_target (t);
|
||
linux_nat_set_new_thread (t, amd64_linux_new_thread);
|
||
linux_nat_set_new_fork (t, amd64_linux_new_fork);
|
||
linux_nat_set_forget_process (t, i386_forget_process);
|
||
linux_nat_set_siginfo_fixup (t, amd64_linux_siginfo_fixup);
|
||
linux_nat_set_prepare_to_resume (t, amd64_linux_prepare_to_resume);
|
||
}
|