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471b9d1507
Implement MIPS target support for passing options to the disassembler,
complementing commit 65b48a8140
("GDB: Add support for the new
set/show disassembler-options commands.").
This includes options that expect an argument, so adjust the generic
code and data structures used so as to handle such options. So as to
give backends syntax flexibility no specific delimiter has been defined
to separate options from their respective arguments, so it has to be
included as the last character of the option name. Completion code
however has not been adjusted and consequently option arguments cannot
be completed at this time.
Also the MIPS target has non-empty defaults for the options, so that ABI
names for the general-purpose registers respect our `set mips abi ...'
setting rather than always being determined from the ELF headers of the
binary file selected. Handle these defaults as implicit options, never
shown to the user and always prepended to the user-specified options, so
that the latters can override the defaults.
The resulting output for the MIPS target is as follows:
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
no-aliases Use canonical instruction forms.
msa Recognize MSA instructions.
virt Recognize the virtualization ASE instructions.
xpa Recognize the eXtended Physical Address (XPA) ASE
instructions.
ginv Recognize the Global INValidate (GINV) ASE instructions.
gpr-names=ABI Print GPR names according to specified ABI.
Default: based on binary being disassembled.
fpr-names=ABI Print FPR names according to specified ABI.
Default: numeric.
cp0-names=ARCH Print CP0 register names according to specified architecture.
Default: based on binary being disassembled.
hwr-names=ARCH Print HWR names according to specified architecture.
Default: based on binary being disassembled.
reg-names=ABI Print GPR and FPR names according to specified ABI.
reg-names=ARCH Print CP0 register and HWR names according to specified
architecture.
For the options above, the following values are supported for "ABI":
numeric 32 n32 64
For the options above, the following values are supported for "ARCH":
numeric r3000 r3900 r4000 r4010 vr4100 vr4111 vr4120 r4300 r4400 r4600
r4650 r5000 vr5400 vr5500 r5900 r6000 rm7000 rm9000 r8000 r10000 r12000
r14000 r16000 mips5 mips32 mips32r2 mips32r3 mips32r5 mips32r6 mips64
mips64r2 mips64r3 mips64r5 mips64r6 interaptiv-mr2 sb1 loongson2e
loongson2f loongson3a octeon octeon+ octeon2 octeon3 xlr xlp
(gdb)
which corresponds to what `objdump --help' used to print for the MIPS
target, with minor formatting changes, most notably option argument
lists being wrapped, but also the amount of white space separating
options from the respective descriptions. The relevant part the new
code is now also used by `objdump --help', which means these formatting
changes apply to both outputs, except for argument list wrapping, which
is GDB-specific.
This also adds a separating new line between the heading and option
lists where descriptions are provided, hence:
(gdb) set architecture s390:31-bit
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
esa Disassemble in ESA architecture mode
zarch Disassemble in z/Architecture mode
insnlength Print unknown instructions according to length from first two bits
(gdb)
but:
(gdb) set architecture powerpc:common
(gdb) show disassembler-options
The current disassembler options are ''
The following disassembler options are supported for use with the
'set disassembler-options <option>[,<option>...]' command:
403, 405, 440, 464, 476, 601, 603, 604, 620, 7400, 7410, 7450, 7455, 750cl,
821, 850, 860, a2, altivec, any, booke, booke32, cell, com, e200z4, e300,
e500, e500mc, e500mc64, e5500, e6500, e500x2, efs, efs2, power4, power5,
power6, power7, power8, power9, ppc, ppc32, 32, ppc64, 64, ppc64bridge,
ppcps, pwr, pwr2, pwr4, pwr5, pwr5x, pwr6, pwr7, pwr8, pwr9, pwrx, raw, spe,
spe2, titan, vle, vsx
(gdb)
Existing affected target backends have been adjusted accordingly.
This has been verified manually with:
(gdb) set architecture arm
(gdb) set architecture powerpc:common
(gdb) set architecture s390:31-bit
to cause no issues with the `show disassembler-options' and `set
disassembler-options' commands. A test case for the MIPS target has
also been provided, covering the default settings with ABI overrides as
well as disassembler option overrides.
2018-07-02 Maciej W. Rozycki <macro@mips.com>
Simon Marchi <simon.marchi@polymtl.ca>
include/
PR tdep/8282
* dis-asm.h (disasm_option_arg_t): New typedef.
(disasm_options_and_args_t): Likewise.
(disasm_options_t): Add `arg' member, document members.
(disassembler_options_mips): New prototype.
(disassembler_options_arm, disassembler_options_powerpc)
(disassembler_options_s390): Update prototypes.
opcodes/
PR tdep/8282
* mips-dis.c (mips_option_arg_t): New enumeration.
(mips_options): New variable.
(disassembler_options_mips): New function.
(print_mips_disassembler_options): Reimplement in terms of
`disassembler_options_mips'.
* arm-dis.c (disassembler_options_arm): Adapt to using the
`disasm_options_and_args_t' structure.
* ppc-dis.c (disassembler_options_powerpc): Likewise.
* s390-dis.c (disassembler_options_s390): Likewise.
gdb/
PR tdep/8282
* disasm.h (gdb_disassembler): Add
`m_disassembler_options_holder'. member
* disasm.c (get_all_disassembler_options): New function.
(gdb_disassembler::gdb_disassembler): Use it.
(gdb_buffered_insn_length_init_dis): Likewise.
(gdb_buffered_insn_length): Adjust accordingly.
(set_disassembler_options): Handle options with arguments.
(show_disassembler_options_sfunc): Likewise. Add a leading new
line if showing options with descriptions.
(disassembler_options_completer): Adapt to using the
`disasm_options_and_args_t' structure.
* mips-tdep.c (mips_disassembler_options): New variable.
(mips_disassembler_options_o32): Likewise.
(mips_disassembler_options_n32): Likewise.
(mips_disassembler_options_n64): Likewise.
(gdb_print_insn_mips): Don't set `disassembler_options'.
(gdb_print_insn_mips_n32, gdb_print_insn_mips_n64): Remove
functions.
(mips_gdbarch_init): Always set `gdbarch_print_insn' to
`gdb_print_insn_mips'. Set `gdbarch_disassembler_options',
`gdbarch_disassembler_options_implicit' and
`gdbarch_valid_disassembler_options'.
* arm-tdep.c (_initialize_arm_tdep): Adapt to using the
`disasm_options_and_args_t' structure.
* gdbarch.sh (disassembler_options_implicit): New `gdbarch'
method.
(valid_disassembler_options): Switch from `disasm_options_t' to
the `disasm_options_and_args_t' structure.
* NEWS: Document `set disassembler-options' support for the MIPS
target.
* gdbarch.h: Regenerate.
* gdbarch.c: Regenerate.
gdb/doc/
PR tdep/8282
* gdb.texinfo (Source and Machine Code): Document `set
disassembler-options' support for the MIPS target.
gdb/testsuite/
PR tdep/8282
* gdb.arch/mips-disassembler-options.exp: New test.
* gdb.arch/mips-disassembler-options.s: New test source.
160 lines
4.8 KiB
C++
160 lines
4.8 KiB
C++
/* Disassemble support for GDB.
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Copyright (C) 2002-2018 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef DISASM_H
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#define DISASM_H
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#include "dis-asm.h"
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#include "common/enum-flags.h"
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enum gdb_disassembly_flag
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{
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DISASSEMBLY_SOURCE_DEPRECATED = (0x1 << 0),
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DISASSEMBLY_RAW_INSN = (0x1 << 1),
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DISASSEMBLY_OMIT_FNAME = (0x1 << 2),
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DISASSEMBLY_FILENAME = (0x1 << 3),
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DISASSEMBLY_OMIT_PC = (0x1 << 4),
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DISASSEMBLY_SOURCE = (0x1 << 5),
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DISASSEMBLY_SPECULATIVE = (0x1 << 6),
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};
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DEF_ENUM_FLAGS_TYPE (enum gdb_disassembly_flag, gdb_disassembly_flags);
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struct gdbarch;
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struct ui_out;
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struct ui_file;
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class gdb_disassembler
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{
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using di_read_memory_ftype = decltype (disassemble_info::read_memory_func);
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public:
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gdb_disassembler (struct gdbarch *gdbarch, struct ui_file *file)
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: gdb_disassembler (gdbarch, file, dis_asm_read_memory)
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{}
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int print_insn (CORE_ADDR memaddr, int *branch_delay_insns = NULL);
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/* Return the gdbarch of gdb_disassembler. */
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struct gdbarch *arch ()
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{ return m_gdbarch; }
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protected:
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gdb_disassembler (struct gdbarch *gdbarch, struct ui_file *file,
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di_read_memory_ftype func);
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struct ui_file *stream ()
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{ return (struct ui_file *) m_di.stream; }
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private:
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struct gdbarch *m_gdbarch;
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/* Stores data required for disassembling instructions in
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opcodes. */
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struct disassemble_info m_di;
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/* If we own the string in `m_di.disassembler_options', we do so
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using this field. */
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std::string m_disassembler_options_holder;
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CORE_ADDR m_err_memaddr;
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static int dis_asm_read_memory (bfd_vma memaddr, gdb_byte *myaddr,
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unsigned int len,
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struct disassemble_info *info);
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static void dis_asm_memory_error (int err, bfd_vma memaddr,
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struct disassemble_info *info);
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static void dis_asm_print_address (bfd_vma addr,
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struct disassemble_info *info);
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};
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/* An instruction to be disassembled. */
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struct disasm_insn
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{
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/* The address of the memory containing the instruction. */
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CORE_ADDR addr;
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/* An optional instruction number. If non-zero, it is printed first. */
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unsigned int number;
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/* True if the instruction was executed speculatively. */
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unsigned int is_speculative:1;
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};
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extern void gdb_disassembly (struct gdbarch *gdbarch, struct ui_out *uiout,
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gdb_disassembly_flags flags, int how_many,
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CORE_ADDR low, CORE_ADDR high);
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/* Print the instruction at address MEMADDR in debugged memory,
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on STREAM. Returns the length of the instruction, in bytes,
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and, if requested, the number of branch delay slot instructions. */
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extern int gdb_print_insn (struct gdbarch *gdbarch, CORE_ADDR memaddr,
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struct ui_file *stream, int *branch_delay_insns);
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/* Class used to pretty-print instructions. */
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class gdb_pretty_print_disassembler
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{
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public:
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explicit gdb_pretty_print_disassembler (struct gdbarch *gdbarch)
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: m_di (gdbarch, &m_insn_stb)
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{}
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/* Prints the instruction INSN into UIOUT and returns the length of
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the printed instruction in bytes. */
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int pretty_print_insn (struct ui_out *uiout, const struct disasm_insn *insn,
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gdb_disassembly_flags flags);
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private:
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/* Returns the architecture used for disassembling. */
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struct gdbarch *arch () { return m_di.arch (); }
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/* The disassembler used for instruction printing. */
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gdb_disassembler m_di;
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/* The buffer used to build the instruction string. The
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disassembler is initialized with this stream. */
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string_file m_insn_stb;
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/* The buffer used to build the raw opcodes string. */
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string_file m_opcode_stb;
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};
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/* Return the length in bytes of the instruction at address MEMADDR in
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debugged memory. */
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extern int gdb_insn_length (struct gdbarch *gdbarch, CORE_ADDR memaddr);
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/* Return the length in bytes of INSN, originally at MEMADDR. MAX_LEN
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is the size of the buffer containing INSN. */
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extern int gdb_buffered_insn_length (struct gdbarch *gdbarch,
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const gdb_byte *insn, int max_len,
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CORE_ADDR memaddr);
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/* Returns GDBARCH's disassembler options. */
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extern char *get_disassembler_options (struct gdbarch *gdbarch);
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/* Sets the active gdbarch's disassembler options to OPTIONS. */
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extern void set_disassembler_options (char *options);
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#endif
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