binutils-gdb/ld/emultempl/tic6xdsbt.em
Alan Modra 6d00b59031 bfd target vector rationalisation
This renames the bfd targets to <cpu>_<format>_<other>_<endian>_vec.
So for example, bfd_elf32_ntradlittlemips_vec becomes
mips_elf32_ntrad_le_vec and hp300bsd_vec becomes m68k_aout_hp300bsd_vec.

bfd/
	* aix386-core.c, * aout-adobe.c, * aout-arm.c, * aout-ns32k.c,
	* aout-sparcle.c, * aout0.c, * aoutx.h, * armnetbsd.c, * bout.c,
	* cf-i386lynx.c, * cf-sparclynx.c, * cisco-core.c, * coff-alpha.c,
	* coff-apollo.c, * coff-arm.c, * coff-aux.c, * coff-go32.c,
	* coff-h8300.c, * coff-h8500.c, * coff-i386.c, * coff-i860.c,
	* coff-i960.c, * coff-m68k.c, * coff-m88k.c, * coff-mips.c,
	* coff-rs6000.c, * coff-sh.c, * coff-sparc.c, * coff-stgo32.c,
	* coff-svm68k.c, * coff-tic80.c, * coff-u68k.c, * coff-w65.c,
	* coff-we32k.c, * coff-x86_64.c, * coff-z80.c, * coff-z8k.c,
	* coff64-rs6000.c, * config.bfd, * configure.com, * configure.in,
	* demo64.c, * elf-m10200.c, * elf-m10300.c, * elf32-am33lin.c,
	* elf32-arc.c, * elf32-arm.c, * elf32-avr.c, * elf32-bfin.c,
	* elf32-cr16.c, * elf32-cr16c.c, * elf32-cris.c, * elf32-crx.c,
	* elf32-d10v.c, * elf32-d30v.c, * elf32-dlx.c, * elf32-epiphany.c,
	* elf32-fr30.c, * elf32-frv.c, * elf32-gen.c, * elf32-h8300.c,
	* elf32-hppa.c, * elf32-i370.c, * elf32-i386.c, * elf32-i860.c,
	* elf32-i960.c, * elf32-ip2k.c, * elf32-iq2000.c, * elf32-lm32.c,
	* elf32-m32c.c, * elf32-m32r.c, * elf32-m68hc11.c, * elf32-m68hc12.c,
	* elf32-m68k.c, * elf32-m88k.c, * elf32-mcore.c, * elf32-mep.c,
	* elf32-metag.c, * elf32-microblaze.c, * elf32-mips.c, * elf32-moxie.c,
	* elf32-msp430.c, * elf32-mt.c, * elf32-nds32.c, * elf32-nios2.c,
	* elf32-or1k.c, * elf32-pj.c, * elf32-ppc.c, * elf32-rl78.c,
	* elf32-rx.c, * elf32-s390.c, * elf32-score.c, * elf32-sh-symbian.c,
	* elf32-sh.c, * elf32-sh64.c, * elf32-sparc.c, * elf32-spu.c,
	* elf32-tic6x.c, * elf32-tilegx.c, * elf32-tilepro.c, * elf32-v850.c,
	* elf32-vax.c, * elf32-xc16x.c, * elf32-xgate.c, * elf32-xstormy16.c,
	* elf32-xtensa.c, * elf64-alpha.c, * elf64-gen.c, * elf64-hppa.c,
	* elf64-ia64-vms.c, * elf64-mips.c, * elf64-mmix.c, * elf64-ppc.c,
	* elf64-s390.c, * elf64-sh64.c, * elf64-sparc.c, * elf64-tilegx.c,
	* elf64-x86-64.c, * elfn32-mips.c, * elfnn-aarch64.c, * elfnn-ia64.c,
	* epoc-pe-arm.c, * epoc-pei-arm.c, * hp300bsd.c, * hp300hpux.c,
	* hppabsd-core.c, * hpux-core.c, * i386aout.c, * i386bsd.c,
	* i386dynix.c, * i386freebsd.c, * i386linux.c, * i386lynx.c,
	* i386mach3.c, * i386msdos.c, * i386netbsd.c, * i386os9k.c,
	* irix-core.c, * m68k4knetbsd.c, * m68klinux.c, * m68knetbsd.c,
	* m88kmach3.c, * m88kopenbsd.c, * mach-o-i386.c, * mach-o-x86-64.c,
	* makefile.vms, * mipsbsd.c, * mmo.c, * netbsd-core.c, * newsos3.c,
	* nlm32-alpha.c, * nlm32-i386.c, * nlm32-ppc.c, * nlm32-sparc.c,
	* ns32knetbsd.c, * osf-core.c, * pc532-mach.c, * pe-arm-wince.c,
	* pe-arm.c, * pe-i386.c, * pe-mcore.c, * pe-mips.c, * pe-ppc.c,
	* pe-sh.c, * pe-x86_64.c, * pei-arm-wince.c, * pei-arm.c,
	* pei-i386.c, * pei-ia64.c, * pei-mcore.c, * pei-mips.c, * pei-ppc.c,
	* pei-sh.c, * pei-x86_64.c, * ppcboot.c, * ptrace-core.c, * riscix.c,
	* sco5-core.c, * som.c, * sparclinux.c, * sparclynx.c,
	* sparcnetbsd.c, * sunos.c, * targets.c, * trad-core.c,
	* vax1knetbsd.c, * vaxbsd.c, * vaxnetbsd.c, * versados.c,
	* vms-alpha.c, * vms-lib.c: Rename bfd targets to
	<cpu>_<format>_<other>_<endian>_vec.  Adjust associated MY macros
	on aout targets.
	* configure: Regenerate.
binutils/
	* emul_aix.c: Update bfd target vector naming.
	* testsuite/binutils-all/objcopy.exp: Likewise.
ld/
	* emultempl/metagelf.em: Update bfd target vector naming.
	* emultempl/nios2elf.em: Likewise.
	* emultempl/spuelf.em: Likewise.
	* emultempl/tic6xdsbt.em: Likewise.
2014-05-02 20:09:40 +09:30

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# This shell script emits a C file. -*- C -*-
# Copyright (C) 2011-2014 Free Software Foundation, Inc.
#
# This file is part of the GNU Binutils.
#
# This program is free software; you can redistribute it and/or modify
# it under the terms of the GNU General Public License as published by
# the Free Software Foundation; either version 3 of the License, or
# (at your option) any later version.
#
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY; without even the implied warranty of
# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
# GNU General Public License for more details.
#
# You should have received a copy of the GNU General Public License
# along with this program; if not, write to the Free Software
# Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
# MA 02110-1301, USA.
#
# This file is sourced from elf32.em, and defines extra C6X DSBT specific
# features.
#
fragment <<EOF
#include "ldctor.h"
#include "elf32-tic6x.h"
static struct elf32_tic6x_params params =
{
0, 64
};
static int merge_exidx_entries = -1;
static int
is_tic6x_target (void)
{
extern const bfd_target tic6x_elf32_le_vec;
extern const bfd_target tic6x_elf32_be_vec;
extern const bfd_target tic6x_elf32_linux_le_vec;
extern const bfd_target tic6x_elf32_linux_be_vec;
extern const bfd_target tic6x_elf32_c6000_le_vec;
extern const bfd_target tic6x_elf32_c6000_be_vec;
return (link_info.output_bfd->xvec == &tic6x_elf32_le_vec
|| link_info.output_bfd->xvec == &tic6x_elf32_be_vec
|| link_info.output_bfd->xvec == &tic6x_elf32_linux_le_vec
|| link_info.output_bfd->xvec == &tic6x_elf32_linux_be_vec
|| link_info.output_bfd->xvec == &tic6x_elf32_c6000_le_vec
|| link_info.output_bfd->xvec == &tic6x_elf32_c6000_be_vec);
}
/* Pass params to backend. */
static void
tic6x_after_open (void)
{
if (is_tic6x_target ())
{
if (params.dsbt_index >= params.dsbt_size)
{
einfo (_("%P%F: invalid --dsbt-index %d, outside DSBT size.\n"),
params.dsbt_index);
}
elf32_tic6x_setup (&link_info, &params);
}
gld${EMULATION_NAME}_after_open ();
}
static int
compare_output_sec_vma (const void *a, const void *b)
{
asection *asec = *(asection **) a, *bsec = *(asection **) b;
asection *aout = asec->output_section, *bout = bsec->output_section;
bfd_vma avma, bvma;
/* If there's no output section for some reason, compare equal. */
if (!aout || !bout)
return 0;
avma = aout->vma + asec->output_offset;
bvma = bout->vma + bsec->output_offset;
if (avma > bvma)
return 1;
else if (avma < bvma)
return -1;
return 0;
}
static void
gld${EMULATION_NAME}_after_allocation (void)
{
int layout_changed = 0;
if (!link_info.relocatable)
{
/* Build a sorted list of input text sections, then use that to process
the unwind table index. */
unsigned int list_size = 10;
asection **sec_list = (asection **)
xmalloc (list_size * sizeof (asection *));
unsigned int sec_count = 0;
LANG_FOR_EACH_INPUT_STATEMENT (is)
{
bfd *abfd = is->the_bfd;
asection *sec;
if ((abfd->flags & (EXEC_P | DYNAMIC)) != 0)
continue;
for (sec = abfd->sections; sec != NULL; sec = sec->next)
{
asection *out_sec = sec->output_section;
if (out_sec
&& elf_section_data (sec)
&& elf_section_type (sec) == SHT_PROGBITS
&& (elf_section_flags (sec) & SHF_EXECINSTR) != 0
&& (sec->flags & SEC_EXCLUDE) == 0
&& sec->sec_info_type != SEC_INFO_TYPE_JUST_SYMS
&& out_sec != bfd_abs_section_ptr)
{
if (sec_count == list_size)
{
list_size *= 2;
sec_list = (asection **)
xrealloc (sec_list, list_size * sizeof (asection *));
}
sec_list[sec_count++] = sec;
}
}
}
qsort (sec_list, sec_count, sizeof (asection *), &compare_output_sec_vma);
if (elf32_tic6x_fix_exidx_coverage (sec_list, sec_count, &link_info,
merge_exidx_entries))
layout_changed = 1;
free (sec_list);
}
/* bfd_elf32_discard_info just plays with debugging sections,
ie. doesn't affect any code, so we can delay resizing the
sections. */
if (bfd_elf_discard_info (link_info.output_bfd, & link_info))
layout_changed = 1;
gld${EMULATION_NAME}_map_segments (layout_changed);
}
EOF
# This code gets inserted into the generic elf32.sc linker script
# and allows us to define our own command line switches.
PARSE_AND_LIST_PROLOGUE='
#define OPTION_DSBT_INDEX 300
#define OPTION_DSBT_SIZE 301
#define OPTION_NO_MERGE_EXIDX_ENTRIES 302
'
PARSE_AND_LIST_LONGOPTS='
{"dsbt-index", required_argument, NULL, OPTION_DSBT_INDEX},
{"dsbt-size", required_argument, NULL, OPTION_DSBT_SIZE},
{ "no-merge-exidx-entries", no_argument, NULL, OPTION_NO_MERGE_EXIDX_ENTRIES },
'
PARSE_AND_LIST_OPTIONS='
fprintf (file, _(" --dsbt-index <index>\n"));
fprintf (file, _("\t\t\tUse this as the DSBT index for the output object\n"));
fprintf (file, _(" --dsbt-size <index>\n"));
fprintf (file, _("\t\t\tUse this as the number of entries in the DSBT table\n"));
fprintf (file, _(" --no-merge-exidx-entries Disable merging exidx entries\n"));
'
PARSE_AND_LIST_ARGS_CASES='
case OPTION_DSBT_INDEX:
{
char *end;
params.dsbt_index = strtol (optarg, &end, 0);
if (*end == 0
&& params.dsbt_index >= 0 && params.dsbt_index < 0x7fff)
break;
einfo (_("%P%F: invalid --dsbt-index %s\n"), optarg);
}
break;
case OPTION_DSBT_SIZE:
{
char *end;
params.dsbt_size = strtol (optarg, &end, 0);
if (*end == 0
&& params.dsbt_size >= 0 && params.dsbt_size < 0x7fff)
break;
einfo (_("%P%F: invalid --dsbt-size %s\n"), optarg);
}
break;
case OPTION_NO_MERGE_EXIDX_ENTRIES:
merge_exidx_entries = 0;
'
LDEMUL_AFTER_OPEN=tic6x_after_open
LDEMUL_AFTER_ALLOCATION=gld${EMULATION_NAME}_after_allocation