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224 lines
6.3 KiB
C
224 lines
6.3 KiB
C
/* Main simulator entry points specific to the M32R.
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Copyright (C) 1996-2018 Free Software Foundation, Inc.
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Contributed by Cygnus Support.
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This file is part of GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include "sim-main.h"
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#include "sim-options.h"
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#include "libiberty.h"
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#include "bfd.h"
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#ifdef HAVE_STRING_H
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#include <string.h>
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#else
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#ifdef HAVE_STRINGS_H
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#include <strings.h>
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#endif
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#endif
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#ifdef HAVE_STDLIB_H
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#include <stdlib.h>
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#endif
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#include "dv-m32r_uart.h"
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static void free_state (SIM_DESC);
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static void print_m32r_misc_cpu (SIM_CPU *cpu, int verbose);
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/* Cover function of sim_state_free to free the cpu buffers as well. */
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static void
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free_state (SIM_DESC sd)
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{
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if (STATE_MODULES (sd) != NULL)
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sim_module_uninstall (sd);
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sim_cpu_free_all (sd);
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sim_state_free (sd);
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}
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/* Create an instance of the simulator. */
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SIM_DESC
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sim_open (kind, callback, abfd, argv)
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SIM_OPEN_KIND kind;
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host_callback *callback;
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struct bfd *abfd;
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char * const *argv;
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{
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SIM_DESC sd = sim_state_alloc (kind, callback);
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char c;
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int i;
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/* The cpu data is kept in a separately allocated chunk of memory. */
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if (sim_cpu_alloc_all (sd, 1, cgen_cpu_max_extra_bytes ()) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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#if 0 /* FIXME: pc is in mach-specific struct */
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/* FIXME: watchpoints code shouldn't need this */
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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STATE_WATCHPOINTS (sd)->pc = &(PC);
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STATE_WATCHPOINTS (sd)->sizeof_pc = sizeof (PC);
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}
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#endif
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if (sim_pre_argv_init (sd, argv[0]) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* The parser will print an error message for us, so we silently return. */
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if (sim_parse_args (sd, argv) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Allocate a handler for the control registers and other devices
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if no memory for that range has been allocated by the user.
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All are allocated in one chunk to keep things from being
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unnecessarily complicated.
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TODO: Move these to the sim-model framework. */
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sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_uart", UART_BASE_ADDR, 0x100);
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sim_hw_parse (sd, "/core/%s/reg %#x %i", "m32r_cache", 0xfffffff0, 0x10);
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/* Allocate core managed memory if none specified by user.
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Use address 4 here in case the user wanted address 0 unmapped. */
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if (sim_core_read_buffer (sd, NULL, read_map, &c, 4, 1) == 0)
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sim_do_commandf (sd, "memory region 0,0x%x", M32R_DEFAULT_MEM_SIZE);
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/* check for/establish the reference program image */
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if (sim_analyze_program (sd,
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(STATE_PROG_ARGV (sd) != NULL
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? *STATE_PROG_ARGV (sd)
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: NULL),
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abfd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Establish any remaining configuration options. */
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if (sim_config (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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if (sim_post_argv_init (sd) != SIM_RC_OK)
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{
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free_state (sd);
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return 0;
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}
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/* Open a copy of the cpu descriptor table. */
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{
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CGEN_CPU_DESC cd = m32r_cgen_cpu_open_1 (STATE_ARCHITECTURE (sd)->printable_name,
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CGEN_ENDIAN_BIG);
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for (i = 0; i < MAX_NR_PROCESSORS; ++i)
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{
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SIM_CPU *cpu = STATE_CPU (sd, i);
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CPU_CPU_DESC (cpu) = cd;
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CPU_DISASSEMBLER (cpu) = sim_cgen_disassemble_insn;
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}
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m32r_cgen_init_dis (cd);
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}
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/* Initialize various cgen things not done by common framework.
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Must be done after m32r_cgen_cpu_open. */
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cgen_init (sd);
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for (c = 0; c < MAX_NR_PROCESSORS; ++c)
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{
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/* Only needed for profiling, but the structure member is small. */
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memset (CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i)), 0,
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sizeof (* CPU_M32R_MISC_PROFILE (STATE_CPU (sd, i))));
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/* Hook in callback for reporting these stats */
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PROFILE_INFO_CPU_CALLBACK (CPU_PROFILE_DATA (STATE_CPU (sd, i)))
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= print_m32r_misc_cpu;
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}
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return sd;
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}
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SIM_RC
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sim_create_inferior (sd, abfd, argv, envp)
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SIM_DESC sd;
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struct bfd *abfd;
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char * const *argv;
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char * const *envp;
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{
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SIM_CPU *current_cpu = STATE_CPU (sd, 0);
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SIM_ADDR addr;
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if (abfd != NULL)
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addr = bfd_get_start_address (abfd);
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else
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addr = 0;
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sim_pc_set (current_cpu, addr);
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#ifdef M32R_LINUX
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m32rbf_h_cr_set (current_cpu,
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m32r_decode_gdb_ctrl_regnum(SPI_REGNUM), 0x1f00000);
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m32rbf_h_cr_set (current_cpu,
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m32r_decode_gdb_ctrl_regnum(SPU_REGNUM), 0x1f00000);
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#endif
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/* Standalone mode (i.e. `run`) will take care of the argv for us in
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sim_open() -> sim_parse_args(). But in debug mode (i.e. 'target sim'
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with `gdb`), we need to handle it because the user can change the
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argv on the fly via gdb's 'run'. */
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if (STATE_PROG_ARGV (sd) != argv)
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{
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freeargv (STATE_PROG_ARGV (sd));
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STATE_PROG_ARGV (sd) = dupargv (argv);
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}
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return SIM_RC_OK;
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}
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/* PROFILE_CPU_CALLBACK */
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static void
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print_m32r_misc_cpu (SIM_CPU *cpu, int verbose)
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{
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SIM_DESC sd = CPU_STATE (cpu);
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char buf[20];
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if (CPU_PROFILE_FLAGS (cpu) [PROFILE_INSN_IDX])
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{
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sim_io_printf (sd, "Miscellaneous Statistics\n\n");
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sim_io_printf (sd, " %-*s %s\n\n",
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PROFILE_LABEL_WIDTH, "Fill nops:",
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sim_add_commas (buf, sizeof (buf),
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CPU_M32R_MISC_PROFILE (cpu)->fillnop_count));
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if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32rx)
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sim_io_printf (sd, " %-*s %s\n\n",
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PROFILE_LABEL_WIDTH, "Parallel insns:",
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sim_add_commas (buf, sizeof (buf),
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CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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if (STATE_ARCHITECTURE (sd)->mach == bfd_mach_m32r2)
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sim_io_printf (sd, " %-*s %s\n\n",
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PROFILE_LABEL_WIDTH, "Parallel insns:",
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sim_add_commas (buf, sizeof (buf),
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CPU_M32R_MISC_PROFILE (cpu)->parallel_count));
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}
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}
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