Nick Clifton 795b8e6bf3 * include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type in ... order to encode separately the msb and lsb of a register pair ; this will be needed to encode the opcodes the same way as Ti assembler does. * gas/config/tc-tic6x.c: handle tic6x_coding_dreg_(msb|lsb) field coding types and use it to encode register pair numbers when required. * opcodes/tic6x-dis.c: decodes opcodes that have individual msb and lsb halves in src1 & src2 fields ; discard the src1 (lsb) value and only use src2 (msb), discarding bit 0, to follow what Ti SDK does in that case as any value in the src1 field yields the same output with SDK disassembler. * include/opcode/tic6x-opcode-table.h: modify absdp, dpint, dpsp, dptrunc, rcpdp and rsqrdp opcodes to use the new field coding types. * gas/testsuite/gas/tic6x/insns-c674x.d, gas/testsuite/gas/tic6x/insns-c674x.s : add test case for the newly generated opcode but keep the old ones as they seem legit as per Ti disassembler output.		2013-03-20 16:36:34 +00:00
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config
gas	* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type in	2013-03-20 16:36:34 +00:00
lib
ChangeLog	* include/opcode/tic6x.h: add tic6x_coding_dreg_(msb|lsb) field coding type in	2013-03-20 16:36:34 +00:00
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