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https://sourceware.org/git/binutils-gdb.git
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2d0ca82411
bfd * elfnn-aarch64.c: Fix relaxations for ILP32 mode. ld * testsuite/ld-aarch64/aarch64-elf.exp: Run new tests. * testsuite/ld-aarch64/tls-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-all-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gd-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-gdesc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-2-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-3-ilp32.d: New test. * testsuite/ld-aarch64/tls-relax-ie-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-desc-le-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-ie-ilp32.d: New test. * testsuite/ld-aarch64/tls-tiny-gd-le-ilp32.d: New test.
41 lines
1.3 KiB
Makefile
41 lines
1.3 KiB
Makefile
#source: tls-relax-all.s
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#as: -mabi=ilp32
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#ld: -m [aarch64_choose_ilp32_emul] -T relocs-ilp32.ld -e0
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#objdump: -dr
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#...
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+10000: a9bf7bfd stp x29, x30, \[sp, #-16\]!
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+10004: 910003fd mov x29, sp
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+10008: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
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+1000c: b9400400 ldr w0, \[x0, #4\]
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+10010: d503201f nop
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+10014: d503201f nop
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+10018: d53bd041 mrs x1, tpidr_el0
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+1001c: 8b000020 add x0, x1, x0
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+10020: b9400001 ldr w1, \[x0\]
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+10024: 52a00000 movz w0, #0x0, lsl #16
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+10028: 72800180 movk w0, #0xc
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+1002c: d503201f nop
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+10030: d503201f nop
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+10034: d53bd042 mrs x2, tpidr_el0
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+10038: 8b000040 add x0, x2, x0
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+1003c: b9400000 ldr w0, \[x0\]
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+10040: 0b000021 add w1, w1, w0
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+10044: 90000080 adrp x0, 20000 <_GLOBAL_OFFSET_TABLE_>
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+10048: b9400800 ldr w0, \[x0, #8\]
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+1004c: d53bd041 mrs x1, tpidr_el0
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+10050: 0b000020 add w0, w1, w0
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+10054: b9400000 ldr w0, \[x0\]
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+10058: 0b000021 add w1, w1, w0
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+1005c: 52a00000 movz w0, #0x0, lsl #16
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+10060: 72800280 movk w0, #0x14
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+10064: d53bd041 mrs x1, tpidr_el0
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+10068: 0b000020 add w0, w1, w0
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+1006c: b9400000 ldr w0, \[x0\]
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+10070: 0b000021 add w1, w1, w0
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+10074: d53bd042 mrs x2, tpidr_el0
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+10078: 52a00000 movz w0, #0x0, lsl #16
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+1007c: 72800300 movk w0, #0x18
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+10080: 8b000040 add x0, x2, x0
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+10084: b9400000 ldr w0, \[x0\]
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+10088: 0b000020 add w0, w1, w0
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