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https://sourceware.org/git/binutils-gdb.git
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09c1e68a16
binutils * testsuite/binutils-all/aarch64/in-order-all.d: Update to use new
disassembly.
* testsuite/binutils-all/aarch64/out-of-order-all.d: Likewise.
ld/ * testsuite/ld-aarch64/erratum843419_tls_ie.d: Use udf in disassembly.
* testsuite/ld-aarch64/farcall-b-section.d: Likewise.
* testsuite/ld-aarch64/farcall-back.d: Likewise.
* testsuite/ld-aarch64/farcall-bl-section.d: Likewise.
gas/ * config/tc-aarch64.c (fix_insn): Implement for AARCH64_OPND_UNDEFINED.
(parse_operands): Implement for AARCH64_OPND_UNDEFINED.
* testsuite/gas/aarch64/udf.s: New.
* testsuite/gas/aarch64/udf.d: New.
* testsuite/gas/aarch64/udf-invalid.s: New.
* testsuite/gas/aarch64/udf-invalid.l: New.
* testsuite/gas/aarch64/udf-invalid.d: New.
include * opcode/aarch64.h (enum aarch64_opnd): Add AARCH64_OPND_UNDEFINED.
opcodes * aarch64-opc.h (enum aarch64_field_kind): Add FLD_imm16_2.
* aarch64-opc.c (fields): Add entry for FLD_imm16_2.
(operand_general_constraint_met_p): validate AARCH64_OPND_UNDEFINED.
* aarch64-tbl.h (aarch64_opcode_table): Add udf instruction, entry for
FLD_imm16_2.
* aarch64-asm-2.c: Regenerated.
* aarch64-dis-2.c: Regenerated.
* aarch64-opc-2.c: Regenerated.
77 lines
2.2 KiB
Makefile
77 lines
2.2 KiB
Makefile
#name: aarch64-farcall-back
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#source: farcall-back.s
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#as:
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#ld: -Ttext 0x1000 --section-start .foo=0x100000000
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#notarget: aarch64_be-*-*
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#objdump: -dr
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#...
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Disassembly of section .text:
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0000000000001000 <_start>:
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1000: 14000414 b 2050 <__bar1_veneer>
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1004: 94000413 bl 2050 <__bar1_veneer>
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1008: 14000408 b 2028 <__bar2_veneer>
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100c: 94000407 bl 2028 <__bar2_veneer>
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1010: 1400040a b 2038 <__bar3_veneer>
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1014: 94000409 bl 2038 <__bar3_veneer>
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1018: d65f03c0 ret
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...
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000000000000201c <_back>:
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201c: d65f03c0 ret
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[ \t]+2020:[ \t]+14000014[ \t]+b[ \t]+2070 <__bar1_veneer\+0x20>
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[ \t]+2024:[ \t]+d503201f[ \t]+nop
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0000000000002028 <__bar2_veneer>:
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2028: f07ffff0 adrp x16, 100001000 <bar1\+0x1000>
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202c: 91002210 add x16, x16, #0x8
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2030: d61f0200 br x16
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2034: 00000000 udf #0
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0000000000002038 <__bar3_veneer>:
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2038: 58000090 ldr x16, 2048 <__bar3_veneer\+0x10>
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203c: 10000011 adr x17, 203c <__bar3_veneer\+0x4>
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2040: 8b110210 add x16, x16, x17
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2044: d61f0200 br x16
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2048: ffffffd4 .word 0xffffffd4
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204c: 00000000 .word 0x00000000
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0000000000002050 <__bar1_veneer>:
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2050: d07ffff0 adrp x16, 100000000 <bar1>
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2054: 91000210 add x16, x16, #0x0
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2058: d61f0200 br x16
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...
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Disassembly of section .foo:
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0000000100000000 <bar1>:
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100000000: d65f03c0 ret
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100000004: 14000807 b 100002020 <___start_veneer>
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...
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0000000100001008 <bar2>:
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100001008: d65f03c0 ret
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10000100c: 14000405 b 100002020 <___start_veneer>
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...
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0000000100002010 <bar3>:
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100002010: d65f03c0 ret
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100002014: 14000009 b 100002038 <___back_veneer>
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[ \t]+100002018:[ \t]+1400000e[ \t]+b[ \t]+100002050 <___back_veneer\+0x18>
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[ \t]+10000201c:[ \t]+d503201f[ \t]+nop
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0000000100002020 <___start_veneer>:
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100002020: 58000090 ldr x16, 100002030 <___start_veneer\+0x10>
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100002024: 10000011 adr x17, 100002024 <___start_veneer\+0x4>
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100002028: 8b110210 add x16, x16, x17
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10000202c: d61f0200 br x16
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100002030: ffffefdc .word 0xffffefdc
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100002034: fffffffe .word 0xfffffffe
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0000000100002038 <___back_veneer>:
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100002038: 90800010 adrp x16, 2000 <_start\+0x1000>
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10000203c: 91007210 add x16, x16, #0x1c
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100002040: d61f0200 br x16
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...
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