binutils-gdb/sim/testsuite/frv/smulicc.cgs
Mike Frysinger 1368b914e9 sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.

We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim".  Since we have no
other dirs in this tree, and no plans to add any, should be fine.
2021-01-15 19:18:34 -05:00

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# frv testcase for smulicc $GRi,$GRj,$GRk
# mach: all
.include "testutils.inc"
start
.global smulicc
smulicc:
; Positive operands
set_gr_immed 3,gr7 ; multiply small numbers
set_icc 0x0,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 6,gr9
set_gr_immed 1,gr7 ; multiply by 1
set_icc 0x1,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed 2,gr7 ; multiply by 1
set_icc 0x2,0
smulicc gr7,1,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed 0,gr7 ; multiply by 0
set_icc 0x3,0
smulicc gr7,2,gr8,icc0
test_icc 0 1 1 1 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_immed 2,gr7 ; multiply by 0
set_icc 0x4,0
smulicc gr7,0,gr8,icc0
test_icc 0 1 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result
set_icc 0x5,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
set_icc 0x6,0
smulicc gr7,2,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
set_icc 0x7,0
smulicc gr7,4,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_immed 1,gr8
test_gr_limmed 0x0000,0x0000,gr9
set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result
set_icc 0x8,0
smulicc gr7,0x1ff,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0xff,gr8
test_gr_limmed 0x7fff,0xfe01,gr9
; Mixed operands
set_gr_immed -3,gr7 ; multiply small numbers
set_icc 0x9,0
smulicc gr7,2,gr8,icc0
test_icc 1 0 0 1 icc0
test_gr_immed -1,gr8
test_gr_immed -6,gr9
set_gr_immed 3,gr7 ; multiply small numbers
set_icc 0xa,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_immed -1,gr8
test_gr_immed -6,gr9
set_gr_immed 1,gr7 ; multiply by 1
set_icc 0xb,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_immed -1,gr8
test_gr_immed -2,gr9
set_gr_immed -2,gr7 ; multiply by 1
set_icc 0xc,0
smulicc gr7,1,gr8,icc0
test_icc 1 0 0 0 icc0
test_gr_immed -1,gr8
test_gr_immed -2,gr9
set_gr_immed 0,gr7 ; multiply by 0
set_icc 0xd,0
smulicc gr7,-2,gr8,icc0
test_icc 0 1 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_immed -2,gr7 ; multiply by 0
set_icc 0xe,0
smulicc gr7,0,gr8,icc0
test_icc 0 1 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 0,gr9
set_gr_limmed 0x2000,0x0001,gr7 ; 31 bit result
set_icc 0xf,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0xbfff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
set_icc 0x0,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 0 0 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0x4000,0x0001,gr7 ; 32 bit result
set_icc 0x1,0
smulicc gr7,-2,gr8,icc0
test_icc 1 0 0 1 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
set_icc 0x2,0
smulicc gr7,-4,gr8,icc0
test_icc 1 0 1 0 icc0
test_gr_limmed 0xffff,0xffff,gr8
test_gr_limmed 0x0000,0x0000,gr9
set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result
set_icc 0x3,0
smulicc gr7,-512,gr8,icc0
test_icc 1 0 1 1 icc0
test_gr_limmed 0xffff,0xff00,gr8
test_gr_limmed 0x0000,0x0200,gr9
; Negative operands
set_gr_immed -3,gr7 ; multiply small numbers
set_icc 0x4,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_immed 6,gr9
set_gr_immed -1,gr7 ; multiply by 1
set_icc 0x5,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_immed -2,gr7 ; multiply by 1
set_icc 0x6,0
smulicc gr7,-1,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_immed 0,gr8
test_gr_immed 2,gr9
set_gr_limmed 0xc000,0x0001,gr7 ; 31 bit result
set_icc 0x7,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x7fff,0xfffe,gr9
set_gr_limmed 0xc000,0x0000,gr7 ; 32 bit result
set_icc 0x8,0
smulicc gr7,-2,gr8,icc0
test_icc 0 0 0 0 icc0
test_gr_immed 0,gr8
test_gr_limmed 0x8000,0x0000,gr9
set_gr_limmed 0xc000,0x0000,gr7 ; 33 bit result
set_icc 0x9,0
smulicc gr7,-4,gr8,icc0
test_icc 0 0 0 1 icc0
test_gr_immed 1,gr8
test_gr_immed 0x00000000,gr9
set_gr_limmed 0x8000,0x0001,gr7 ; almost max positive result
set_icc 0xa,0
smulicc gr7,-512,gr8,icc0
test_icc 0 0 1 0 icc0
test_gr_limmed 0x0000,0x00ff,gr8
test_gr_limmed 0xffff,0xfe00,gr9
set_gr_limmed 0x8000,0x0000,gr7 ; max positive result
set_icc 0xb,0
smulicc gr7,-512,gr8,icc0
test_icc 0 0 1 1 icc0
test_gr_limmed 0x0000,0x0100,gr8
test_gr_limmed 0x0000,0x0000,gr9
pass