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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
211 lines
4.7 KiB
Plaintext
211 lines
4.7 KiB
Plaintext
# frv testcase for smuli $GRi,$GRj,$GRk
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# mach: all
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.include "testutils.inc"
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start
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.global smuli
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smuli:
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; Positive operands
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set_gr_immed 3,gr7 ; multiply small numbers
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set_icc 0x0,0
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smuli gr7,2,gr8
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test_icc 0 0 0 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 6,gr9
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set_gr_immed 1,gr7 ; multiply by 1
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set_icc 0x1,0
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smuli gr7,2,gr8
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test_icc 0 0 0 1 icc0
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test_gr_immed 0,gr8
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test_gr_immed 2,gr9
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set_gr_immed 2,gr7 ; multiply by 1
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set_icc 0x2,0
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smuli gr7,1,gr8
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test_icc 0 0 1 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 2,gr9
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set_gr_immed 0,gr7 ; multiply by 0
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set_icc 0x3,0
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smuli gr7,2,gr8
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test_icc 0 0 1 1 icc0
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test_gr_immed 0,gr8
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test_gr_immed 0,gr9
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set_gr_immed 2,gr7 ; multiply by 0
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set_icc 0x4,0
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smuli gr7,0,gr8
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test_icc 0 1 0 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 0,gr9
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set_gr_limmed 0x3fff,0xffff,gr7 ; 31 bit result
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set_icc 0x5,0
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smuli gr7,2,gr8
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test_icc 0 1 0 1 icc0
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test_gr_immed 0,gr8
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test_gr_limmed 0x7fff,0xfffe,gr9
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_icc 0x6,0
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smuli gr7,2,gr8
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test_icc 0 1 1 0 icc0
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test_gr_immed 0,gr8
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test_gr_limmed 0x8000,0x0000,gr9
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_icc 0x7,0
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smuli gr7,4,gr8
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test_icc 0 1 1 1 icc0
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test_gr_immed 1,gr8
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test_gr_limmed 0x0000,0x0000,gr9
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set_gr_limmed 0x7fff,0xffff,gr7 ; max positive result
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set_icc 0x8,0
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smuli gr7,0x7ff,gr8
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test_icc 1 0 0 0 icc0
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test_gr_immed 0x3ff,gr8
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test_gr_limmed 0x7fff,0xf801,gr9
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; Mixed operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_icc 0x9,0
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smuli gr7,2,gr8
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test_icc 1 0 0 1 icc0
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test_gr_immed -1,gr8
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test_gr_immed -6,gr9
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set_gr_immed 3,gr7 ; multiply small numbers
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set_icc 0xa,0
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smuli gr7,-2,gr8
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test_icc 1 0 1 0 icc0
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test_gr_immed -1,gr8
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test_gr_immed -6,gr9
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set_gr_immed 1,gr7 ; multiply by 1
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set_icc 0xb,0
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smuli gr7,-2,gr8
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test_icc 1 0 1 1 icc0
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test_gr_immed -1,gr8
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test_gr_immed -2,gr9
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set_gr_immed -2,gr7 ; multiply by 1
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set_icc 0xc,0
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smuli gr7,1,gr8
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test_icc 1 1 0 0 icc0
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test_gr_immed -1,gr8
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test_gr_immed -2,gr9
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set_gr_immed 0,gr7 ; multiply by 0
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set_icc 0xd,0
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smuli gr7,-2,gr8
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test_icc 1 1 0 1 icc0
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test_gr_immed 0,gr8
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test_gr_immed 0,gr9
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set_gr_immed -2,gr7 ; multiply by 0
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set_icc 0xe,0
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smuli gr7,0,gr8
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test_icc 1 1 1 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 0,gr9
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set_gr_limmed 0x2000,0x0001,gr7 ; 31 bit result
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set_icc 0xf,0
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smuli gr7,-2,gr8
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test_icc 1 1 1 1 icc0
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test_gr_limmed 0xffff,0xffff,gr8
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test_gr_limmed 0xbfff,0xfffe,gr9
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set_gr_limmed 0x4000,0x0000,gr7 ; 32 bit result
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set_icc 0x0,0
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smuli gr7,-2,gr8
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test_icc 0 0 0 0 icc0
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test_gr_limmed 0xffff,0xffff,gr8
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test_gr_limmed 0x8000,0x0000,gr9
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set_gr_limmed 0x4000,0x0001,gr7 ; 32 bit result
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set_icc 0x1,0
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smuli gr7,-2,gr8
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test_icc 0 0 0 1 icc0
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test_gr_limmed 0xffff,0xffff,gr8
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test_gr_limmed 0x7fff,0xfffe,gr9
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set_gr_limmed 0x4000,0x0000,gr7 ; 33 bit result
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set_icc 0x2,0
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smuli gr7,-4,gr8
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test_icc 0 0 1 0 icc0
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test_gr_limmed 0xffff,0xffff,gr8
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test_gr_limmed 0x0000,0x0000,gr9
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set_gr_limmed 0x7fff,0xffff,gr7 ; max negative result
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set_icc 0x3,0
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smuli gr7,-2048,gr8
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test_icc 0 0 1 1 icc0
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test_gr_limmed 0xffff,0xfc00,gr8
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test_gr_limmed 0x0000,0x0800,gr9
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; Negative operands
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set_gr_immed -3,gr7 ; multiply small numbers
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set_icc 0x4,0
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smuli gr7,-2,gr8
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test_icc 0 1 0 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 6,gr9
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set_gr_immed -1,gr7 ; multiply by 1
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set_icc 0x5,0
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smuli gr7,-2,gr8
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test_icc 0 1 0 1 icc0
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test_gr_immed 0,gr8
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test_gr_immed 2,gr9
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set_gr_immed -2,gr7 ; multiply by 1
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set_icc 0x6,0
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smuli gr7,-1,gr8
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test_icc 0 1 1 0 icc0
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test_gr_immed 0,gr8
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test_gr_immed 2,gr9
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set_gr_limmed 0xc000,0x0001,gr7 ; 31 bit result
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set_icc 0x7,0
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smuli gr7,-2,gr8
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test_icc 0 1 1 1 icc0
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test_gr_immed 0,gr8
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test_gr_limmed 0x7fff,0xfffe,gr9
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set_gr_limmed 0xc000,0x0000,gr7 ; 32 bit result
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set_icc 0x8,0
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smuli gr7,-2,gr8
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test_icc 1 0 0 0 icc0
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test_gr_immed 0,gr8
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test_gr_limmed 0x8000,0x0000,gr9
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set_gr_limmed 0xc000,0x0000,gr7 ; 33 bit result
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set_icc 0x9,0
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smuli gr7,-4,gr8
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test_icc 1 0 0 1 icc0
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test_gr_immed 1,gr8
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test_gr_immed 0x00000000,gr9
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set_gr_limmed 0x8000,0x0001,gr7 ; almost max positive result
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set_icc 0xa,0
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smuli gr7,-2048,gr8
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test_icc 1 0 1 0 icc0
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test_gr_limmed 0x0000,0x03ff,gr8
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test_gr_limmed 0xffff,0xf800,gr9
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set_gr_limmed 0x8000,0x0000,gr7 ; max positive result
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set_icc 0xb,0
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smuli gr7,-2048,gr8
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test_icc 1 0 1 1 icc0
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test_gr_limmed 0x0000,0x0400,gr8
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test_gr_limmed 0x0000,0x0000,gr9
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pass
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