mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-03 04:12:10 +08:00
1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
121 lines
2.7 KiB
Plaintext
121 lines
2.7 KiB
Plaintext
# frv testcase for csthf $FRk,@($GRi,$GRj),$CCi,$cond
|
|
# mach: all
|
|
|
|
.include "testutils.inc"
|
|
|
|
start
|
|
|
|
.global csthf
|
|
csthf:
|
|
set_spr_immed 0x1b1b,cccr
|
|
set_gr_gr sp,gr20
|
|
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc0,1
|
|
test_mem_limmed 0xffff,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc0,1
|
|
test_mem_limmed 0xffff,0xaaaa,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc4,1
|
|
test_mem_limmed 0xffff,0xbbbb,gr20
|
|
|
|
set_gr_gr gr20,sp
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc0,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc0,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc4,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_gr gr20,sp
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc1,0
|
|
test_mem_limmed 0xffff,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc1,0
|
|
test_mem_limmed 0xffff,0xaaaa,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc5,0
|
|
test_mem_limmed 0xffff,0xbbbb,gr20
|
|
|
|
set_gr_gr gr20,sp
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc1,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc1,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc5,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_gr gr20,sp
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc2,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc2,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc6,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_gr gr20,sp
|
|
set_mem_limmed 0xdead,0xbeef,sp
|
|
set_gr_immed 0,gr7
|
|
set_fr_iimmed 0x1111,0xffff,fr8
|
|
csthf fr8,@(sp,gr7),cc3,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
set_gr_immed 2,gr7
|
|
set_fr_iimmed 0xffff,0xaaaa,fr8
|
|
csthf fr8,@(sp,gr7),cc3,0
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
inc_gr_immed 4,sp
|
|
set_gr_immed -2,gr7
|
|
set_fr_iimmed 0x2222,0xbbbb,fr8
|
|
csthf fr8,@(sp,gr7),cc7,1
|
|
test_mem_limmed 0xdead,0xbeef,gr20
|
|
|
|
pass
|