binutils-gdb/sim/testsuite/frv/bclelr.cgs
Mike Frysinger 1368b914e9 sim: testsuite: flatten tree
Now that all port tests live under testsuite/sim/*/, and none live
in testsuite/ directly, flatten the structure by moving all of the
dirs under testsuite/sim/ to testsuite/ directly.

We need to stop passing --tool to dejagnu so that it searches all
dirs and not just ones that start with "sim".  Since we have no
other dirs in this tree, and no plans to add any, should be fine.
2021-01-15 19:18:34 -05:00

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# frv testcase for bclelr $ICCi,$ccond,$hint
# mach: all
.include "testutils.inc"
start
.global bclelr
bclelr:
; ccond is true
set_spr_immed 128,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bclelr icc0,0,0
set_spr_addr bad,lr
set_icc 0x1 1
bclelr icc1,0,1
set_spr_addr ok3,lr
set_icc 0x2 2
bclelr icc2,0,2
fail
ok3:
set_spr_addr ok4,lr
set_icc 0x3 3
bclelr icc3,0,3
fail
ok4:
set_spr_addr ok5,lr
set_icc 0x4 0
bclelr icc0,0,0
fail
ok5:
set_spr_addr ok6,lr
set_icc 0x5 1
bclelr icc1,0,1
fail
ok6:
set_spr_addr ok7,lr
set_icc 0x6 2
bclelr icc2,0,2
fail
ok7:
set_spr_addr ok8,lr
set_icc 0x7 3
bclelr icc3,0,3
fail
ok8:
set_spr_addr ok9,lr
set_icc 0x8 0
bclelr icc0,0,0
fail
ok9:
set_spr_addr oka,lr
set_icc 0x9 1
bclelr icc1,0,1
fail
oka:
set_spr_addr bad,lr
set_icc 0xa 2
bclelr icc2,0,2
set_spr_addr bad,lr
set_icc 0xb 3
bclelr icc3,0,3
set_spr_addr okd,lr
set_icc 0xc 0
bclelr icc0,0,0
fail
okd:
set_spr_addr oke,lr
set_icc 0xd 1
bclelr icc1,0,1
fail
oke:
set_spr_addr okf,lr
set_icc 0xe 2
bclelr icc2,0,2
fail
okf:
set_spr_addr okg,lr
set_icc 0xf 3
bclelr icc3,0,3
fail
okg:
; ccond is true
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bclelr icc0,1,0
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x1 1
bclelr icc1,1,1
set_spr_immed 1,lcr
set_spr_addr okj,lr
set_icc 0x2 2
bclelr icc2,1,2
fail
okj:
set_spr_immed 1,lcr
set_spr_addr okk,lr
set_icc 0x3 3
bclelr icc3,1,3
fail
okk:
set_spr_immed 1,lcr
set_spr_addr okl,lr
set_icc 0x4 0
bclelr icc0,1,0
fail
okl:
set_spr_immed 1,lcr
set_spr_addr okm,lr
set_icc 0x5 1
bclelr icc1,1,1
fail
okm:
set_spr_immed 1,lcr
set_spr_addr okn,lr
set_icc 0x6 2
bclelr icc2,1,2
fail
okn:
set_spr_immed 1,lcr
set_spr_addr oko,lr
set_icc 0x7 3
bclelr icc3,1,3
fail
oko:
set_spr_immed 1,lcr
set_spr_addr okp,lr
set_icc 0x8 0
bclelr icc0,1,0
fail
okp:
set_spr_immed 1,lcr
set_spr_addr okq,lr
set_icc 0x9 1
bclelr icc1,1,1
fail
okq:
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xa 2
bclelr icc2,1,2
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0xb 3
bclelr icc3,1,3
set_spr_immed 1,lcr
set_spr_addr okt,lr
set_icc 0xc 0
bclelr icc0,1,0
fail
okt:
set_spr_immed 1,lcr
set_spr_addr oku,lr
set_icc 0xd 1
bclelr icc1,1,1
fail
oku:
set_spr_immed 1,lcr
set_spr_addr okv,lr
set_icc 0xe 2
bclelr icc2,1,2
fail
okv:
set_spr_immed 1,lcr
set_spr_addr okw,lr
set_icc 0xf 3
bclelr icc3,1,3
fail
okw:
; ccond is false
set_spr_immed 128,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bclelr icc0,1,0
set_icc 0x1 1
bclelr icc1,1,1
set_icc 0x2 2
bclelr icc2,1,2
set_icc 0x3 3
bclelr icc3,1,3
set_icc 0x4 0
bclelr icc0,1,0
set_icc 0x5 1
bclelr icc1,1,1
set_icc 0x6 2
bclelr icc2,1,2
set_icc 0x7 3
bclelr icc3,1,3
set_icc 0x8 0
bclelr icc0,1,0
set_icc 0x9 1
bclelr icc1,1,1
set_icc 0xa 2
bclelr icc2,1,2
set_icc 0xb 3
bclelr icc3,1,3
set_icc 0xc 0
bclelr icc0,1,0
set_icc 0xd 1
bclelr icc1,1,1
set_icc 0xe 2
bclelr icc2,1,2
set_icc 0xf 3
bclelr icc3,1,3
; ccond is false
set_spr_immed 1,lcr
set_spr_addr bad,lr
set_icc 0x0 0
bclelr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x1 1
bclelr icc1,0,1
set_spr_immed 1,lcr
set_icc 0x2 2
bclelr icc2,0,2
set_spr_immed 1,lcr
set_icc 0x3 3
bclelr icc3,0,3
set_spr_immed 1,lcr
set_icc 0x4 0
bclelr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x5 1
bclelr icc1,0,1
set_spr_immed 1,lcr
set_icc 0x6 2
bclelr icc2,0,2
set_spr_immed 1,lcr
set_icc 0x7 3
bclelr icc3,0,3
set_spr_immed 1,lcr
set_icc 0x8 0
bclelr icc0,0,0
set_spr_immed 1,lcr
set_icc 0x9 1
bclelr icc1,0,1
set_spr_immed 1,lcr
set_icc 0xa 2
bclelr icc2,0,2
set_spr_immed 1,lcr
set_icc 0xb 3
bclelr icc3,0,3
set_spr_immed 1,lcr
set_icc 0xc 0
bclelr icc0,0,0
set_spr_immed 1,lcr
set_icc 0xd 1
bclelr icc1,0,1
set_spr_immed 1,lcr
set_icc 0xe 2
bclelr icc2,0,2
set_spr_immed 1,lcr
set_icc 0xf 3
bclelr icc3,0,3
pass
bad:
fail