mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-03 04:12:10 +08:00
1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
285 lines
3.9 KiB
Plaintext
285 lines
3.9 KiB
Plaintext
# frv testcase for bchilr $ICCi,$ccond,$hint
|
|
# mach: all
|
|
|
|
.include "testutils.inc"
|
|
|
|
start
|
|
|
|
.global bchilr
|
|
bchilr:
|
|
; ccond is true
|
|
set_spr_immed 128,lcr
|
|
set_spr_addr ok1,lr
|
|
set_icc 0x0 0
|
|
bchilr icc0,0,0
|
|
fail
|
|
ok1:
|
|
set_spr_addr bad,lr
|
|
set_icc 0x1 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_addr ok3,lr
|
|
set_icc 0x2 2
|
|
bchilr icc2,0,2
|
|
fail
|
|
ok3:
|
|
set_spr_addr bad,lr
|
|
set_icc 0x3 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0x4 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0x5 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0x6 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0x7 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_addr ok9,lr
|
|
set_icc 0x8 0
|
|
bchilr icc0,0,0
|
|
fail
|
|
ok9:
|
|
set_spr_addr bad,lr
|
|
set_icc 0x9 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_addr okb,lr
|
|
set_icc 0xa 2
|
|
bchilr icc2,0,2
|
|
fail
|
|
okb:
|
|
set_spr_addr bad,lr
|
|
set_icc 0xb 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0xc 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0xd 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0xe 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_addr bad,lr
|
|
set_icc 0xf 3
|
|
bchilr icc3,0,3
|
|
|
|
; ccond is true
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr okh,lr
|
|
set_icc 0x0 0
|
|
bchilr icc0,1,0
|
|
fail
|
|
okh:
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x1 1
|
|
bchilr icc1,1,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr okj,lr
|
|
set_icc 0x2 2
|
|
bchilr icc2,1,2
|
|
fail
|
|
okj:
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x3 3
|
|
bchilr icc3,1,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x4 0
|
|
bchilr icc0,1,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x5 1
|
|
bchilr icc1,1,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x6 2
|
|
bchilr icc2,1,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x7 3
|
|
bchilr icc3,1,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr okp,lr
|
|
set_icc 0x8 0
|
|
bchilr icc0,1,0
|
|
fail
|
|
okp:
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x9 1
|
|
bchilr icc1,1,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr okr,lr
|
|
set_icc 0xa 2
|
|
bchilr icc2,1,2
|
|
fail
|
|
okr:
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0xb 3
|
|
bchilr icc3,1,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0xc 0
|
|
bchilr icc0,1,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0xd 1
|
|
bchilr icc1,1,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0xe 2
|
|
bchilr icc2,1,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0xf 3
|
|
bchilr icc3,1,3
|
|
|
|
; ccond is false
|
|
set_spr_immed 128,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x0 0
|
|
bchilr icc0,1,0
|
|
|
|
set_icc 0x1 1
|
|
bchilr icc1,1,1
|
|
|
|
set_icc 0x2 2
|
|
bchilr icc2,1,2
|
|
|
|
set_icc 0x3 3
|
|
bchilr icc3,1,3
|
|
|
|
set_icc 0x4 0
|
|
bchilr icc0,1,0
|
|
|
|
set_icc 0x5 1
|
|
bchilr icc1,1,1
|
|
|
|
set_icc 0x6 2
|
|
bchilr icc2,1,2
|
|
|
|
set_icc 0x7 3
|
|
bchilr icc3,1,3
|
|
|
|
set_icc 0x8 0
|
|
bchilr icc0,1,0
|
|
|
|
set_icc 0x9 1
|
|
bchilr icc1,1,1
|
|
|
|
set_icc 0xa 2
|
|
bchilr icc2,1,2
|
|
|
|
set_icc 0xb 3
|
|
bchilr icc3,1,3
|
|
|
|
set_icc 0xc 0
|
|
bchilr icc0,1,0
|
|
|
|
set_icc 0xd 1
|
|
bchilr icc1,1,1
|
|
|
|
set_icc 0xe 2
|
|
bchilr icc2,1,2
|
|
|
|
set_icc 0xf 3
|
|
bchilr icc3,1,3
|
|
|
|
; ccond is false
|
|
set_spr_immed 1,lcr
|
|
set_spr_addr bad,lr
|
|
set_icc 0x0 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x1 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x2 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x3 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x4 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x5 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x6 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x7 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x8 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0x9 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xa 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xb 3
|
|
bchilr icc3,0,3
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xc 0
|
|
bchilr icc0,0,0
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xd 1
|
|
bchilr icc1,0,1
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xe 2
|
|
bchilr icc2,0,2
|
|
|
|
set_spr_immed 1,lcr
|
|
set_icc 0xf 3
|
|
bchilr icc3,0,3
|
|
|
|
pass
|
|
bad:
|
|
fail
|