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1d506c26d9
This commit is the result of the following actions:
- Running gdb/copyright.py to update all of the copyright headers to
include 2024,
- Manually updating a few files the copyright.py script told me to
update, these files had copyright headers embedded within the
file,
- Regenerating gdbsupport/Makefile.in to refresh it's copyright
date,
- Using grep to find other files that still mentioned 2023. If
these files were updated last year from 2022 to 2023 then I've
updated them this year to 2024.
I'm sure I've probably missed some dates. Feel free to fix them up as
you spot them.
354 lines
9.6 KiB
C
354 lines
9.6 KiB
C
/* dv-nvram.c -- Generic driver for a non volatile ram (battery saved)
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Copyright (C) 1999-2024 Free Software Foundation, Inc.
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Written by Stephane Carrez (stcarrez@worldnet.fr)
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(From a driver model Contributed by Cygnus Solutions.)
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/* This must come before any other includes. */
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#include "defs.h"
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#include "sim-main.h"
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#include "hw-main.h"
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#include "sim-assert.h"
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#include <unistd.h>
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#include <fcntl.h>
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#include <errno.h>
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#include "m68hc11-sim.h"
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/* DEVICE
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nvram - Non Volatile Ram
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DESCRIPTION
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Implements a generic battery saved CMOS ram. This ram device does
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not contain any realtime clock and does not generate any interrupt.
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The ram content is loaded from a file and saved when it is changed.
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It is intended to be generic.
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PROPERTIES
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reg <base> <length>
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Base and size of the non-volatile ram bank.
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file <path>
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Path where the memory must be saved or loaded when we start.
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mode {map | save-modified | save-all}
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Controls how to load and save the memory content.
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map The file is mapped in memory
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save-modified The simulator keeps an open file descriptor to
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the file and saves portion of memory which are
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modified.
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save-all The simulator saves the complete memory each time
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it's modified (it does not keep an open file
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descriptor).
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PORTS
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None.
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NOTES
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This device is independent of the Motorola 68hc11.
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*/
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/* static functions */
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/* Control of how to access the ram and save its content. */
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enum nvram_mode
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{
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/* Save the complete ram block each time it's changed.
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We don't keep an open file descriptor. This should be
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ok for small memory banks. */
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NVRAM_SAVE_ALL,
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/* Save only the memory bytes which are modified.
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This mode means that we have to keep an open file
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descriptor (O_RDWR). It's good for middle sized memory banks. */
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NVRAM_SAVE_MODIFIED,
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/* Map file in memory (not yet implemented).
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This mode is suitable for large memory banks. We don't allocate
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a buffer to represent the ram, instead it's mapped in memory
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with mmap. */
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NVRAM_MAP_FILE
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};
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struct nvram
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{
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address_word base_address; /* Base address of ram. */
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unsigned size; /* Size of ram. */
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uint8_t *data; /* Pointer to ram memory. */
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const char *file_name; /* Path of ram file. */
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int fd; /* File description of opened ram file. */
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enum nvram_mode mode; /* How load/save ram file. */
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};
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/* Finish off the partially created hw device. Attach our local
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callbacks. Wire up our port names etc. */
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static hw_io_read_buffer_method nvram_io_read_buffer;
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static hw_io_write_buffer_method nvram_io_write_buffer;
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static void
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attach_nvram_regs (struct hw *me, struct nvram *controller)
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{
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unsigned_word attach_address;
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int attach_space;
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unsigned attach_size;
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reg_property_spec reg;
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int result, oerrno;
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/* Get ram bank description (base and size). */
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if (hw_find_property (me, "reg") == NULL)
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hw_abort (me, "Missing \"reg\" property");
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if (!hw_find_reg_array_property (me, "reg", 0, ®))
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hw_abort (me, "\"reg\" property must contain one addr/size entry");
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hw_unit_address_to_attach_address (hw_parent (me),
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®.address,
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&attach_space,
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&attach_address,
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me);
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hw_unit_size_to_attach_size (hw_parent (me),
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®.size,
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&attach_size, me);
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hw_attach_address (hw_parent (me), 0,
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attach_space, attach_address, attach_size,
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me);
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controller->mode = NVRAM_SAVE_ALL;
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controller->base_address = attach_address;
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controller->size = attach_size;
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controller->fd = -1;
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/* Get the file where the ram content must be loaded/saved. */
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if(hw_find_property (me, "file") == NULL)
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hw_abort (me, "Missing \"file\" property");
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controller->file_name = hw_find_string_property (me, "file");
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/* Get the mode which defines how to save the memory. */
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if(hw_find_property (me, "mode") != NULL)
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{
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const char *value = hw_find_string_property (me, "mode");
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if (strcmp (value, "map") == 0)
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controller->mode = NVRAM_MAP_FILE;
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else if (strcmp (value, "save-modified") == 0)
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controller->mode = NVRAM_SAVE_MODIFIED;
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else if (strcmp (value, "save-all") == 0)
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controller->mode = NVRAM_SAVE_ALL;
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else
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hw_abort (me, "illegal value for mode parameter `%s': "
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"use map, save-modified or save-all", value);
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}
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/* Initialize the ram by loading/mapping the file in memory.
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If the file does not exist, create and give it some content. */
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switch (controller->mode)
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{
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case NVRAM_MAP_FILE:
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hw_abort (me, "'map' mode is not yet implemented, use 'save-modified'");
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break;
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case NVRAM_SAVE_MODIFIED:
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case NVRAM_SAVE_ALL:
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controller->data = hw_malloc (me, attach_size);
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if (controller->data == 0)
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hw_abort (me, "Not enough memory, try to use the mode 'map'");
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memset (controller->data, 0, attach_size);
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controller->fd = open (controller->file_name, O_RDWR);
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if (controller->fd < 0)
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{
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controller->fd = open (controller->file_name,
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O_RDWR | O_CREAT, 0644);
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if (controller->fd < 0)
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hw_abort (me, "Cannot open or create file '%s'",
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controller->file_name);
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result = write (controller->fd, controller->data, attach_size);
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if (result != attach_size)
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{
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oerrno = errno;
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hw_free (me, controller->data);
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close (controller->fd);
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errno = oerrno;
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hw_abort (me, "Failed to save the ram content");
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}
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}
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else
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{
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result = read (controller->fd, controller->data, attach_size);
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if (result != attach_size)
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{
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oerrno = errno;
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hw_free (me, controller->data);
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close (controller->fd);
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errno = oerrno;
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hw_abort (me, "Failed to load the ram content");
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}
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}
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if (controller->mode == NVRAM_SAVE_ALL)
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{
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close (controller->fd);
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controller->fd = -1;
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}
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break;
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default:
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break;
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}
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}
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static void
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nvram_finish (struct hw *me)
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{
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struct nvram *controller;
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controller = HW_ZALLOC (me, struct nvram);
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set_hw_data (me, controller);
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set_hw_io_read_buffer (me, nvram_io_read_buffer);
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set_hw_io_write_buffer (me, nvram_io_write_buffer);
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/* Attach ourself to our parent bus. */
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attach_nvram_regs (me, controller);
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}
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/* generic read/write */
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static unsigned
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nvram_io_read_buffer (struct hw *me,
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void *dest,
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int space,
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unsigned_word base,
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unsigned nr_bytes)
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{
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struct nvram *controller = hw_data (me);
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HW_TRACE ((me, "read 0x%08lx %d [%ld]",
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(long) base, (int) nr_bytes,
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(long) (base - controller->base_address)));
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base -= controller->base_address;
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if (base + nr_bytes > controller->size)
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nr_bytes = controller->size - base;
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memcpy (dest, &controller->data[base], nr_bytes);
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return nr_bytes;
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}
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static unsigned
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nvram_io_write_buffer (struct hw *me,
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const void *source,
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int space,
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unsigned_word base,
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unsigned nr_bytes)
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{
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struct nvram *controller = hw_data (me);
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HW_TRACE ((me, "write 0x%08lx %d [%ld]",
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(long) base, (int) nr_bytes,
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(long) (base - controller->base_address)));
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base -= controller->base_address;
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if (base + nr_bytes > controller->size)
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nr_bytes = controller->size - base;
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switch (controller->mode)
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{
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case NVRAM_SAVE_ALL:
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{
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int fd, result, oerrno;
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fd = open (controller->file_name, O_WRONLY, 0644);
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if (fd < 0)
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{
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return 0;
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}
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memcpy (&controller->data[base], source, nr_bytes);
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result = write (fd, controller->data, controller->size);
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oerrno = errno;
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close (fd);
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errno = oerrno;
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if (result != controller->size)
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{
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return 0;
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}
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return nr_bytes;
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}
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case NVRAM_SAVE_MODIFIED:
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{
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off_t pos;
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int result;
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pos = lseek (controller->fd, (off_t) base, SEEK_SET);
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if (pos != (off_t) base)
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return 0;
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result = write (controller->fd, source, nr_bytes);
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if (result < 0)
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return 0;
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nr_bytes = result;
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break;
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}
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default:
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break;
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}
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memcpy (&controller->data[base], source, nr_bytes);
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return nr_bytes;
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}
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const struct hw_descriptor dv_nvram_descriptor[] = {
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{ "nvram", nvram_finish, },
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{ NULL },
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};
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