mirror of
https://sourceware.org/git/binutils-gdb.git
synced 2024-12-09 04:21:49 +08:00
660df28acf
Changing objdump disassembly output like this always requires some testsuite changes, with the avr and x64_64 changes simply due to picking up better symbols, the whole point of the patch. The mips changes are due to mips-sgi-irix changing STT_NOTYPE symbols to STT_OBJECT, which objdump now chooses in preference to script symbols. The problem is that objdump looks at the first symbol in the section being disassembled, and if object type, just dumps out bytes rather than disassembling. This results in new failures: FAIL: JAL overflow 2 FAIL: undefined weak symbol overflow FAIL: undefined weak symbol overflow (n32) FAIL: undefined weak symbol overflow (n64) So for mips-sgi-irix function symbols really do need to be function type. I fixed a few more than just the required minimum to avoid the above test fails. binutils/ * objdump.c (compare_section): New static var. (compare_symbols): Sort by current section only. Don't access symbol name out of bounds when checking for file symbols. Sort section symbols and object symbols. (find_symbol_for_address): Remove bogus debugging and section symbol test. (disassemble_data): Move symbol sort from here.. (disassemble_section): ..to here. Set compare_section. ld/ * testsuite/ld-avr/lds-mega.d: Adjust symbols to suit objdump change. * testsuite/ld-avr/lds-tiny.d: Likewise. * testsuite/ld-x86-64/load2.d: Likewise. * testsuite/ld-mips-elf/compact-eh1.s: Give function symbols function type. * testsuite/ld-mips-elf/compact-eh1a.s: Likewise. * testsuite/ld-mips-elf/compact-eh1b.s: Likewise. * testsuite/ld-mips-elf/compact-eh2.s: Likewise. * testsuite/ld-mips-elf/compact-eh3.s: Likewise. * testsuite/ld-mips-elf/compact-eh3a.s: Likewise. * testsuite/ld-mips-elf/eh-frame5.s: Likewise. * testsuite/ld-mips-elf/ehdr_start-new.s: Likewise. * testsuite/ld-mips-elf/ehdr_start-o32.s: Likewise. * testsuite/ld-mips-elf/emit-relocs-1a.s: Likewise. * testsuite/ld-mips-elf/jaloverflow-2.s: Likewise. * testsuite/ld-mips-elf/jaloverflow.s: Likewise. * testsuite/ld-mips-elf/mips16-call-global-1.s: Likewise. * testsuite/ld-mips-elf/mips16-intermix-1.s: Likewise. * testsuite/ld-mips-elf/mips16-pic-1b.s: Likewise. * testsuite/ld-mips-elf/mips16-pic-4c.s: Likewise. * testsuite/ld-mips-elf/no-shared-1-n64.s: Likewise. * testsuite/ld-mips-elf/no-shared-1-o32.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-1b-micromips.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-1b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-2a.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-3b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-4b.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-5a.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-n32c.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-n64c.s: Likewise. * testsuite/ld-mips-elf/pic-and-nonpic-6-o32c.s: Likewise. * testsuite/ld-mips-elf/pie.s: Likewise. * testsuite/ld-mips-elf/relax-jalr.s: Likewise. * testsuite/ld-mips-elf/reloc-1a.s: Likewise. * testsuite/ld-mips-elf/reloc-2a.s: Likewise. * testsuite/ld-mips-elf/reloc-4.s: Likewise. * testsuite/ld-mips-elf/reloc-5.s: Likewise. * testsuite/ld-mips-elf/reloc-6b.s: Likewise. * testsuite/ld-mips-elf/textrel-1.s: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.s: Likewise. * testsuite/ld-mips-elf/undefweak-overflow.d: Adjust.
80 lines
1.4 KiB
ArmAsm
80 lines
1.4 KiB
ArmAsm
.globl _start
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.type _start, @function
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.globl sdg
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.set noreorder
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.ent tstarta
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tstarta:
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_start:
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lui $4,%hi(tstarta - 0x8010)
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addiu $4,$4,%lo(tstarta - 0x8010)
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lui $4,%hi(tstarta - 0x8000)
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addiu $4,$4,%lo(tstarta - 0x8000)
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lui $4,%hi(tstarta)
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addiu $4,$4,%lo(tstarta)
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lui $4,%hi(tstarta + 0x7ff0)
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addiu $4,$4,%lo(tstarta + 0x7ff0)
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t32a:
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lui $4,%hi(tstarta + 0x8010)
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addiu $4,$4,%lo(tstarta + 0x8010)
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lui $4,%hi(t32a - 0x8010)
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addiu $4,$4,%lo(t32a - 0x8010)
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lui $4,%hi(t32a - 0x8000)
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addiu $4,$4,%lo(t32a - 0x8000)
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lui $4,%hi(t32a)
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addiu $4,$4,%lo(t32a)
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lui $4,%hi(t32a + 0x7ff0)
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addiu $4,$4,%lo(t32a + 0x7ff0)
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lui $4,%hi(t32a + 0x8010)
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addiu $4,$4,%lo(t32a + 0x8010)
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lui $4,%hi(_start - 0x8010)
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addiu $4,$4,%lo(_start - 0x8010)
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lui $4,%hi(_start - 0x8000)
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addiu $4,$4,%lo(_start - 0x8000)
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lui $4,%hi(_start)
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addiu $4,$4,%lo(_start)
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lui $4,%hi(_start + 0x7ff0)
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addiu $4,$4,%lo(_start + 0x7ff0)
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lui $4,%hi(_start + 0x8010)
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addiu $4,$4,%lo(_start + 0x8010)
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addiu $4,$4,%gp_rel(sdg - 4)
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addiu $4,$4,%gp_rel(sdg)
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addiu $4,$4,%gp_rel(sdg + 4)
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addiu $4,$4,%gp_rel(sdla - 4)
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addiu $4,$4,%gp_rel(sdla)
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addiu $4,$4,%gp_rel(sdla + 4)
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jal tstarta - 4
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nop
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jal tstarta
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nop
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jal tstarta + 4
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nop
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jal t32a - 4
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nop
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jal t32a
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nop
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jal t32a + 4
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nop
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jal _start - 4
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nop
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jal _start
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nop
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jal _start + 4
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nop
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.org 0xfff0
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.end tstarta
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.section .sdata
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.space 16
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sdg:
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sdla:
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.space 16
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