Christoph Müllner 7344223096 RISC-V: Add T-Head CondMov vendor extension ... T-Head has a range of vendor-specific instructions. Therefore it makes sense to group them into smaller chunks in form of vendor extensions. This patch adds the XTheadCondMov extension, a collection of T-Head-specific conditional move instructions. The 'th' prefix and the "XTheadCondMov" extension are documented in a PR for the RISC-V toolchain conventions ([1]). [1] https://github.com/riscv-non-isa/riscv-toolchain-conventions/pull/19 Co-developed-by: Lifang Xia <lifang_xia@linux.alibaba.com> Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>		2022-09-22 18:06:09 +02:00
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aarch64.h	libopcodes/aarch64: add support for disassembler styling	2022-07-29 13:58:32 +01:00
alpha.h
arc-attrs.h
arc-func.h
arc.h
arm.h
avr.h
bfin.h
cgen.h
ChangeLog-0415
ChangeLog-9103
convex.h
cr16.h
cris.h
crx.h
csky.h	Remove use of bfd_uint64_t and similar	2022-05-27 22:08:59 +09:30
d10v.h
d30v.h
dlx.h
ft32.h
h8300.h
hppa.h
i386.h
ia64.h	Remove use of bfd_uint64_t and similar	2022-05-27 22:08:59 +09:30
loongarch.h
m68hc11.h
m68k.h
metag.h
mips.h
mmix.h
mn10200.h
mn10300.h
moxie.h
msp430-decode.h
msp430.h
nds32.h
nfp.h
nios2.h
nios2r1.h
nios2r2.h
np1.h
ns32k.h
pdp11.h
pj.h
pn.h
ppc.h	ppc: Document the -mfuture and -Mfuture options and make them usable	2022-09-12 14:56:20 -05:00
pru.h
pyr.h
riscv-opc.h	RISC-V: Add T-Head CondMov vendor extension	2022-09-22 18:06:09 +02:00
riscv.h	RISC-V: Add T-Head CondMov vendor extension	2022-09-22 18:06:09 +02:00
rl78.h
rx.h
s12z.h
s390.h
score-datadep.h
score-inst.h
sparc.h
spu-insns.h
spu.h
tic4x.h
tic6x-control-registers.h
tic6x-insn-formats.h
tic6x-opcode-table.h
tic6x.h
tic30.h
tic54x.h
tilegx.h
tilepro.h
v850.h
vax.h
visium.h
wasm.h
xgate.h