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3e43c635d5
* arch.c: Regenerate. * arch.h: Regenerate. * cpu.c: Regenerate. * cpu.h: Regenerate. * cpuall.h: Regenerate. * decode.c: Regenerate. * decode.h: Regenerate. * model.c: Regenerate. * sem-switch.c: Regenerate. * sem.c: Regenerate.
358 lines
5.5 KiB
C
358 lines
5.5 KiB
C
/* Misc. support for CPU family fr30bf.
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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Copyright 1996, 1997, 1998, 1999, 2000, 2001 Free Software Foundation, Inc.
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This file is part of the GNU simulators.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License along
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with this program; if not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*/
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#define WANT_CPU fr30bf
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#define WANT_CPU_FR30BF
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#include "sim-main.h"
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#include "cgen-ops.h"
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/* Get the value of h-pc. */
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USI
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fr30bf_h_pc_get (SIM_CPU *current_cpu)
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{
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return CPU (h_pc);
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}
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/* Set a value for h-pc. */
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void
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fr30bf_h_pc_set (SIM_CPU *current_cpu, USI newval)
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{
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CPU (h_pc) = newval;
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}
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/* Get the value of h-gr. */
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SI
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fr30bf_h_gr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return CPU (h_gr[regno]);
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}
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/* Set a value for h-gr. */
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void
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fr30bf_h_gr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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CPU (h_gr[regno]) = newval;
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}
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/* Get the value of h-cr. */
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SI
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fr30bf_h_cr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return CPU (h_cr[regno]);
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}
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/* Set a value for h-cr. */
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void
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fr30bf_h_cr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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CPU (h_cr[regno]) = newval;
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}
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/* Get the value of h-dr. */
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SI
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fr30bf_h_dr_get (SIM_CPU *current_cpu, UINT regno)
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{
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return GET_H_DR (regno);
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}
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/* Set a value for h-dr. */
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void
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fr30bf_h_dr_set (SIM_CPU *current_cpu, UINT regno, SI newval)
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{
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SET_H_DR (regno, newval);
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}
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/* Get the value of h-ps. */
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USI
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fr30bf_h_ps_get (SIM_CPU *current_cpu)
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{
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return GET_H_PS ();
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}
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/* Set a value for h-ps. */
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void
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fr30bf_h_ps_set (SIM_CPU *current_cpu, USI newval)
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{
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SET_H_PS (newval);
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}
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/* Get the value of h-r13. */
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SI
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fr30bf_h_r13_get (SIM_CPU *current_cpu)
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{
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return CPU (h_r13);
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}
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/* Set a value for h-r13. */
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void
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fr30bf_h_r13_set (SIM_CPU *current_cpu, SI newval)
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{
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CPU (h_r13) = newval;
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}
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/* Get the value of h-r14. */
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SI
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fr30bf_h_r14_get (SIM_CPU *current_cpu)
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{
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return CPU (h_r14);
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}
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/* Set a value for h-r14. */
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void
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fr30bf_h_r14_set (SIM_CPU *current_cpu, SI newval)
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{
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CPU (h_r14) = newval;
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}
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/* Get the value of h-r15. */
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SI
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fr30bf_h_r15_get (SIM_CPU *current_cpu)
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{
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return CPU (h_r15);
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}
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/* Set a value for h-r15. */
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void
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fr30bf_h_r15_set (SIM_CPU *current_cpu, SI newval)
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{
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CPU (h_r15) = newval;
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}
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/* Get the value of h-nbit. */
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BI
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fr30bf_h_nbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_nbit);
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}
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/* Set a value for h-nbit. */
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void
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fr30bf_h_nbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_nbit) = newval;
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}
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/* Get the value of h-zbit. */
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BI
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fr30bf_h_zbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_zbit);
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}
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/* Set a value for h-zbit. */
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void
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fr30bf_h_zbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_zbit) = newval;
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}
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/* Get the value of h-vbit. */
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BI
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fr30bf_h_vbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_vbit);
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}
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/* Set a value for h-vbit. */
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void
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fr30bf_h_vbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_vbit) = newval;
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}
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/* Get the value of h-cbit. */
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BI
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fr30bf_h_cbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_cbit);
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}
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/* Set a value for h-cbit. */
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void
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fr30bf_h_cbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_cbit) = newval;
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}
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/* Get the value of h-ibit. */
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BI
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fr30bf_h_ibit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_ibit);
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}
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/* Set a value for h-ibit. */
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void
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fr30bf_h_ibit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_ibit) = newval;
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}
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/* Get the value of h-sbit. */
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BI
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fr30bf_h_sbit_get (SIM_CPU *current_cpu)
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{
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return GET_H_SBIT ();
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}
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/* Set a value for h-sbit. */
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void
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fr30bf_h_sbit_set (SIM_CPU *current_cpu, BI newval)
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{
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SET_H_SBIT (newval);
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}
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/* Get the value of h-tbit. */
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BI
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fr30bf_h_tbit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_tbit);
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}
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/* Set a value for h-tbit. */
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void
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fr30bf_h_tbit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_tbit) = newval;
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}
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/* Get the value of h-d0bit. */
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BI
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fr30bf_h_d0bit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_d0bit);
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}
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/* Set a value for h-d0bit. */
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void
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fr30bf_h_d0bit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_d0bit) = newval;
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}
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/* Get the value of h-d1bit. */
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BI
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fr30bf_h_d1bit_get (SIM_CPU *current_cpu)
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{
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return CPU (h_d1bit);
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}
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/* Set a value for h-d1bit. */
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void
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fr30bf_h_d1bit_set (SIM_CPU *current_cpu, BI newval)
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{
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CPU (h_d1bit) = newval;
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}
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/* Get the value of h-ccr. */
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UQI
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fr30bf_h_ccr_get (SIM_CPU *current_cpu)
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{
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return GET_H_CCR ();
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}
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/* Set a value for h-ccr. */
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void
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fr30bf_h_ccr_set (SIM_CPU *current_cpu, UQI newval)
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{
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SET_H_CCR (newval);
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}
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/* Get the value of h-scr. */
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UQI
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fr30bf_h_scr_get (SIM_CPU *current_cpu)
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{
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return GET_H_SCR ();
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}
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/* Set a value for h-scr. */
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void
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fr30bf_h_scr_set (SIM_CPU *current_cpu, UQI newval)
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{
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SET_H_SCR (newval);
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}
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/* Get the value of h-ilm. */
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UQI
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fr30bf_h_ilm_get (SIM_CPU *current_cpu)
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{
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return GET_H_ILM ();
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}
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/* Set a value for h-ilm. */
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void
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fr30bf_h_ilm_set (SIM_CPU *current_cpu, UQI newval)
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{
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SET_H_ILM (newval);
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}
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/* Record trace results for INSN. */
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void
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fr30bf_record_trace_results (SIM_CPU *current_cpu, CGEN_INSN *insn,
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int *indices, TRACE_RECORD *tr)
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{
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}
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