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https://sourceware.org/git/binutils-gdb.git
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d031aafbfe
* bfd/archures.c (bfd_arch_mt): Renamed. (bfd_mt_arch): Renamed. (bfd_archures_list): Adjusted. * bfd/bfd-in2.h: Rebuilt. * bfd/config.bfd (mt): Remove special case targ_archs. (mt-*-elf): Rename bfd_elf32_mt_vec. * bfd/configure: Rebuilt. * bfd/configure.in (bfd_elf32_mt_vec): Renamed. (selarchs) Remove mt special case. * bfd/cpu-mt.c (arch_info_struct): Adjust. (bfd_mt_arch): Renamed, adjust. * bfd/elf32-mt.c (mt_reloc_type_lookup, mt_info_to_howto_rela, mt_elf_relocate_hi16, mt_final_link_relocate, mt_relocate_section, mt_elf_howto_table): Renamed, adjusted. (mt_elf_gc_mark_hook, mt_elf_gc_sweep_hook, mt_elf_check_relocs, elf32_mt_machine, mt_elf_object_p, mt_elf_set_private_flags, mt_elf_copy_private_bfd_data, mt_elf_merge_private_bfd_data, mt_elf_print_private_bfd_data): Renamed, adjusted. (TARGET_BIG_SYM, TARGET_BIG_NAME, ELF_ARCH, ELF_MACHINE_CODE, ELF_MAXPAGESIZE, elf_info_to_howto, elf_backend_relocate_section, bfd_elf32_bfd_reloc_type_lookup, elf_backend_gc_mark_hook, elf_backend_gc_sweep_hook, elf_backend_check_relocs, eld_backend_object_p, bfd_elf32_bfd_set_private_flags, bfd_elf32_bfd_copy_private_bfd_data, bfd_elf32_bfd_merge_private_bfd_data, bfd_elf32_bfd_print_private_bfd_data): Adjusted. * bfd/libbfd.h: Regenerated. * bfd/reloc.c (BFD_RELOC_MT_PC16, BFD_RELOC_MT_HI16, BFD_RELOC_MT_LO16, BFD_RELOC_MT_GNU_VTINHERIT, BFD_RELOC_MT_GNU_VTENTRY, BFD_RELOC_MT_PCINSN8): Renamed. * bfd/targets.c (bfd_elf32_mt_vec): Renamed. (_bfd_target_vector): Adjusted. * binutils/readelf.c (guess_is_rela): Use EM_MT. (dump_relocations, get_machine_name): Adjust. * cpu/mt.cpu (define-arch, define-isa): Set name to mt. (define-mach): Adjust. * cpu/mt.opc (CGEN_ASM_HASH): Update. (mt_asm_hash, mt_cgen_insn_supported): Renamed. (parse_loopsize, parse_imm16): Adjust. * gas/configure: Rebuilt. * gas/configure.in (mt): Remove special case. * gas/config/tc-mt.c (opcodes/mt-desc.h, opcodes/mt-opc.h): Change #includes. (mt_insn, mt_mach, mt_mach_bitmask, mt_flags, mt_architectures): Rename, adjust. (md_parse_option, md_show_usage, md_begin, md_assemble, md_cgen_lookup_reloc, md_atof): Adjust. (mt_force_relocation, mt_apply_fix, mt_fix_adjustable): Rename, adjust. * gas/config/tc-mt.h (TC_MT): Rename. (LISTING_HEADER, TARGET_ARCH, TARGET_FORMAT): Adjust. (md_apply_fix): Adjust. (mt_apply_fix, mt_fix_adjustable, mt_force_relocation): Rename. (TC_FORCE_RELOCATION, tc_fix_adjustable): Adjust. * gdb/mt-tdep.c (mt_arch_constants, mt_gdb_regnums): Rename, adjust. (mt_register_name, mt_register_type, mt_register_reggroup_p, mt_return_value, mt_skip_prologue, mt_breapoint_from_pc, mt_pseudo_register_read, mt_pseudo_register_write, mt_frame_align, mt_registers_info, mt_push_dummy_call, mt_unwind_cache, mt_frame_unwind_cache, mt_unwind_pc, mt_unwind_dummy_id, mt_frame_this_id, mt_frame_prev_register, mt_frame_base_address, mt_frame_unwind, mt_frame_sniffer, mt_frame_base, mt_gdbarch_init, _initialize_mt_tdep): Rename & adjust. * include/dis-asm.h (print_insn_mt): Renamed. * include/elf/common.h (EM_MT): Renamed. * include/elf/mt.h: Rename relocs, cpu & other defines. * ld/emulparams/elf32mt.sh (ARCH, OUTPUT_FORMAT): Adjust. * opcodes/Makefile.am (HFILES, CFILES, ALL_MACHINES): Adjust. (stamp-mt): Adjust rule. (mt-asm.lo, mt-desc.lo, mt-dis.lo, mt-ibld.lo, mt-opc.lo): Rename & adjust. * opcodes/Makefile.in: Rebuilt. * opcodes/configure: Rebuilt. * opcodes/configure.in (bfd_mt_arch): Rename & adjust. * opcodes/disassemble.c (ARCH_mt): Renamed. (disassembler): Adjust. * opcodes/mt-asm.c: Renamed, rebuilt. * opcodes/mt-desc.c: Renamed, rebuilt. * opcodes/mt-desc.h: Renamed, rebuilt. * opcodes/mt-dis.c: Renamed, rebuilt. * opcodes/mt-ibld.c: Renamed, rebuilt. * opcodes/mt-opc.c: Renamed, rebuilt. * opcodes/mt-opc.h: Renamed, rebuilt. * sid/Makefile.in: Rebuilt. * sid/aclocal.m4: Rebuilt. * sid/configure: Rebuilt. * sid/sid.spec: Adjust. * sid/bsp/Makefile.am: Adjust. * sid/bsp/Makefile.in: Rebuilt. * sid/bsp/aclocal.m4: Rebuilt. * sid/bsp/configrun-sid.in: Adjust. * sid/bsp/pregen/Makefile.in: Rebuilt. * sid/bsp/pregen/mt-gdb.conf: Renamed & rebuilt. * sid/bsp/pregen/mt-gloss.conf: Renamed & rebuilt. * sid/bsp/pregen/pregen-configs.in: Adjust. * sid/component/aclocal.m4: Rebuilt. * sid/component/configure: Rebuilt. * sid/component/tconfig.in: Adjust. * sid/component/bochs/aclocal.m4: Rebuilt. * sid/component/cache/Makefile.in: Rebuilt. * sid/component/cgen-cpu/Makefile.in: Rebuilt. * sid/component/cgen-cpu/aclocal.m4: Rebuilt. * sid/component/cgen-cpu/compCGEN.cxx: Adjust. * sid/component/cgen-cpu/configure: Rebuilt. * sid/component/cgen-cpu/configure.in: Rebult. * sid/component/cgen-cpu/mt/Makefile.am: Adjust. * sid/component/cgen-cpu/mt/Makefile.in: Rebuilt. * sid/component/cgen-cpu/mt/hw-cpu-mt.txt: Adjust. * sid/component/cgen-cpu/mt/mt-cpu.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-decode.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-defs.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-desc.h: Rebuilt. * sid/component/cgen-cpu/mt/mt-sem.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt-write.cxx: Rebuilt. * sid/component/cgen-cpu/mt/mt.cxx: Adjust. * sid/component/cgen-cpu/mt/mt.h: Adjust. * sid/component/consoles/Makefile.in: Rebuilt. * sid/component/families/aclocal.m4: Rebuilt. * sid/component/families/configure: Rebuilt. * sid/component/gdb/Makefile.in: Rebuilt. * sid/component/gloss/Makefile.in: Rebuilt. * sid/component/glue/Makefile.in: Rebuilt. * sid/component/ide/Makefile.in: Rebuilt. * sid/component/interrupt/Makefile.in: Rebuilt. * sid/component/lcd/Makefile.in: Rebuilt. * sid/component/lcd/testsuite/Makefile.in: Rebuilt. * sid/component/loader/Makefile.am: Rebuilt. * sid/component/loader/Makefile.in: Rebuilt. * sid/component/mapper/Makefile.in: Rebuilt. * sid/component/mapper/testsuite/Makefile.in: Rebuilt. * sid/component/memory/Makefile.in: Rebuilt. * sid/component/mmu/Makefile.in: Rebuilt. * sid/component/parport/Makefile.in: Rebuilt. * sid/component/profiling/Makefile.in: Rebuilt. * sid/component/rtc/Makefile.in: Rebuilt. * sid/component/sched/Makefile.in: Rebuilt. * sid/component/testsuite/Makefile.in: Rebuilt. * sid/component/timers/aclocal.m4: Rebuilt. * sid/component/timers/configure: Rebuilt. * sid/component/uart/Makefile.in: Rebuilt. * sid/component/uart/testsuite/Makefile.in: Rebuilt. * sid/config/config.sub: Adjust. * sid/config/info.tcl.in: Adjust. * sid/config/sidtargets.m4: Adjust. * sid/doc/Makefile.in: Rebuilt. * sid/main/dynamic/Makefile.am: Rebuilt. * sid/main/dynamic/Makefile.in: Rebuilt. * sid/main/dynamic/aclocal.m4: Rebuilt. * sid/main/dynamic/configure: Rebuilt.
720 lines
22 KiB
C
720 lines
22 KiB
C
/* Disassembler interface for targets using CGEN. -*- C -*-
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CGEN: Cpu tools GENerator
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THIS FILE IS MACHINE GENERATED WITH CGEN.
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- the resultant file is machine generated, cgen-dis.in isn't
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Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2005
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Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software Foundation, Inc.,
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51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA. */
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/* ??? Eventually more and more of this stuff can go to cpu-independent files.
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Keep that in mind. */
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#include "sysdep.h"
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#include <stdio.h>
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#include "ansidecl.h"
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#include "dis-asm.h"
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#include "bfd.h"
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#include "symcat.h"
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#include "libiberty.h"
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#include "mt-desc.h"
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#include "mt-opc.h"
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#include "opintl.h"
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/* Default text to print if an instruction isn't recognized. */
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#define UNKNOWN_INSN_MSG _("*unknown*")
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static void print_normal
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(CGEN_CPU_DESC, void *, long, unsigned int, bfd_vma, int);
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static void print_address
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(CGEN_CPU_DESC, void *, bfd_vma, unsigned int, bfd_vma, int) ATTRIBUTE_UNUSED;
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static void print_keyword
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(CGEN_CPU_DESC, void *, CGEN_KEYWORD *, long, unsigned int) ATTRIBUTE_UNUSED;
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static void print_insn_normal
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(CGEN_CPU_DESC, void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int);
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static int print_insn
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, unsigned);
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static int default_print_insn
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *) ATTRIBUTE_UNUSED;
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static int read_insn
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(CGEN_CPU_DESC, bfd_vma, disassemble_info *, bfd_byte *, int, CGEN_EXTRACT_INFO *,
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unsigned long *);
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/* -- disassembler routines inserted here. */
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/* -- dis.c */
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static void print_dollarhex (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
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static void print_pcrel (CGEN_CPU_DESC, PTR, long, unsigned, bfd_vma, int);
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static void
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print_dollarhex (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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disassemble_info *info = (disassemble_info *) dis_info;
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info->fprintf_func (info->stream, "$%lx", value);
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if (0)
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print_normal (cd, dis_info, value, attrs, pc, length);
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}
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static void
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print_pcrel (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
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void * dis_info,
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long value,
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unsigned int attrs ATTRIBUTE_UNUSED,
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bfd_vma pc ATTRIBUTE_UNUSED,
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int length ATTRIBUTE_UNUSED)
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{
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print_address (cd, dis_info, value + pc, attrs, pc, length);
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}
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/* -- */
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void mt_cgen_print_operand
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(CGEN_CPU_DESC, int, PTR, CGEN_FIELDS *, void const *, bfd_vma, int);
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/* Main entry point for printing operands.
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XINFO is a `void *' and not a `disassemble_info *' to not put a requirement
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of dis-asm.h on cgen.h.
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This function is basically just a big switch statement. Earlier versions
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used tables to look up the function to use, but
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- if the table contains both assembler and disassembler functions then
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the disassembler contains much of the assembler and vice-versa,
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- there's a lot of inlining possibilities as things grow,
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- using a switch statement avoids the function call overhead.
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This function could be moved into `print_insn_normal', but keeping it
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separate makes clear the interface between `print_insn_normal' and each of
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the handlers. */
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void
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mt_cgen_print_operand (CGEN_CPU_DESC cd,
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int opindex,
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void * xinfo,
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CGEN_FIELDS *fields,
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void const *attrs ATTRIBUTE_UNUSED,
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bfd_vma pc,
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int length)
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{
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disassemble_info *info = (disassemble_info *) xinfo;
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switch (opindex)
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{
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case MT_OPERAND_A23 :
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print_dollarhex (cd, info, fields->f_a23, 0, pc, length);
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break;
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case MT_OPERAND_BALL :
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print_dollarhex (cd, info, fields->f_ball, 0, pc, length);
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break;
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case MT_OPERAND_BALL2 :
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print_dollarhex (cd, info, fields->f_ball2, 0, pc, length);
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break;
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case MT_OPERAND_BANKADDR :
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print_dollarhex (cd, info, fields->f_bankaddr, 0, pc, length);
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break;
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case MT_OPERAND_BRC :
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print_dollarhex (cd, info, fields->f_brc, 0, pc, length);
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break;
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case MT_OPERAND_BRC2 :
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print_dollarhex (cd, info, fields->f_brc2, 0, pc, length);
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break;
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case MT_OPERAND_CB1INCR :
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print_dollarhex (cd, info, fields->f_cb1incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
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break;
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case MT_OPERAND_CB1SEL :
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print_dollarhex (cd, info, fields->f_cb1sel, 0, pc, length);
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break;
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case MT_OPERAND_CB2INCR :
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print_dollarhex (cd, info, fields->f_cb2incr, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
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break;
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case MT_OPERAND_CB2SEL :
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print_dollarhex (cd, info, fields->f_cb2sel, 0, pc, length);
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break;
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case MT_OPERAND_CBRB :
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print_dollarhex (cd, info, fields->f_cbrb, 0, pc, length);
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break;
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case MT_OPERAND_CBS :
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print_dollarhex (cd, info, fields->f_cbs, 0, pc, length);
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break;
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case MT_OPERAND_CBX :
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print_dollarhex (cd, info, fields->f_cbx, 0, pc, length);
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break;
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case MT_OPERAND_CCB :
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print_dollarhex (cd, info, fields->f_ccb, 0, pc, length);
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break;
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case MT_OPERAND_CDB :
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print_dollarhex (cd, info, fields->f_cdb, 0, pc, length);
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break;
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case MT_OPERAND_CELL :
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print_dollarhex (cd, info, fields->f_cell, 0, pc, length);
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break;
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case MT_OPERAND_COLNUM :
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print_dollarhex (cd, info, fields->f_colnum, 0, pc, length);
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break;
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case MT_OPERAND_CONTNUM :
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print_dollarhex (cd, info, fields->f_contnum, 0, pc, length);
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break;
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case MT_OPERAND_CR :
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print_dollarhex (cd, info, fields->f_cr, 0, pc, length);
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break;
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case MT_OPERAND_CTXDISP :
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print_dollarhex (cd, info, fields->f_ctxdisp, 0, pc, length);
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break;
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case MT_OPERAND_DUP :
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print_dollarhex (cd, info, fields->f_dup, 0, pc, length);
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break;
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case MT_OPERAND_FBDISP :
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print_dollarhex (cd, info, fields->f_fbdisp, 0, pc, length);
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break;
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case MT_OPERAND_FBINCR :
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print_dollarhex (cd, info, fields->f_fbincr, 0, pc, length);
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break;
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case MT_OPERAND_FRDR :
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print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_dr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
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break;
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case MT_OPERAND_FRDRRR :
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print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_drrr, 0|(1<<CGEN_OPERAND_ABS_ADDR));
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break;
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case MT_OPERAND_FRSR1 :
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print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr1, 0|(1<<CGEN_OPERAND_ABS_ADDR));
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break;
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case MT_OPERAND_FRSR2 :
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print_keyword (cd, info, & mt_cgen_opval_h_spr, fields->f_sr2, 0|(1<<CGEN_OPERAND_ABS_ADDR));
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break;
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case MT_OPERAND_ID :
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print_dollarhex (cd, info, fields->f_id, 0, pc, length);
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break;
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case MT_OPERAND_IMM16 :
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print_dollarhex (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_SIGNED), pc, length);
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break;
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case MT_OPERAND_IMM16L :
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print_dollarhex (cd, info, fields->f_imm16l, 0, pc, length);
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break;
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case MT_OPERAND_IMM16O :
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print_pcrel (cd, info, fields->f_imm16s, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
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break;
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case MT_OPERAND_IMM16Z :
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print_dollarhex (cd, info, fields->f_imm16u, 0, pc, length);
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break;
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case MT_OPERAND_INCAMT :
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print_dollarhex (cd, info, fields->f_incamt, 0, pc, length);
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break;
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case MT_OPERAND_INCR :
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print_dollarhex (cd, info, fields->f_incr, 0, pc, length);
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break;
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case MT_OPERAND_LENGTH :
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print_dollarhex (cd, info, fields->f_length, 0, pc, length);
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break;
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case MT_OPERAND_LOOPSIZE :
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print_pcrel (cd, info, fields->f_loopo, 0|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
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break;
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case MT_OPERAND_MASK :
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print_dollarhex (cd, info, fields->f_mask, 0, pc, length);
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break;
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case MT_OPERAND_MASK1 :
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print_dollarhex (cd, info, fields->f_mask1, 0, pc, length);
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break;
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case MT_OPERAND_MODE :
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print_dollarhex (cd, info, fields->f_mode, 0, pc, length);
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break;
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case MT_OPERAND_PERM :
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print_dollarhex (cd, info, fields->f_perm, 0, pc, length);
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break;
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case MT_OPERAND_RBBC :
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print_dollarhex (cd, info, fields->f_rbbc, 0, pc, length);
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break;
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case MT_OPERAND_RC :
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print_dollarhex (cd, info, fields->f_rc, 0, pc, length);
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break;
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case MT_OPERAND_RC1 :
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print_dollarhex (cd, info, fields->f_rc1, 0, pc, length);
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break;
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case MT_OPERAND_RC2 :
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print_dollarhex (cd, info, fields->f_rc2, 0, pc, length);
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break;
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case MT_OPERAND_RC3 :
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print_dollarhex (cd, info, fields->f_rc3, 0, pc, length);
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break;
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case MT_OPERAND_RCNUM :
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print_dollarhex (cd, info, fields->f_rcnum, 0, pc, length);
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break;
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case MT_OPERAND_RDA :
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print_dollarhex (cd, info, fields->f_rda, 0, pc, length);
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break;
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case MT_OPERAND_ROWNUM :
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print_dollarhex (cd, info, fields->f_rownum, 0, pc, length);
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break;
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case MT_OPERAND_ROWNUM1 :
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print_dollarhex (cd, info, fields->f_rownum1, 0, pc, length);
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break;
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case MT_OPERAND_ROWNUM2 :
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print_dollarhex (cd, info, fields->f_rownum2, 0, pc, length);
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break;
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case MT_OPERAND_SIZE :
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print_dollarhex (cd, info, fields->f_size, 0, pc, length);
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break;
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case MT_OPERAND_TYPE :
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print_dollarhex (cd, info, fields->f_type, 0, pc, length);
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break;
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case MT_OPERAND_WR :
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print_dollarhex (cd, info, fields->f_wr, 0, pc, length);
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break;
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case MT_OPERAND_XMODE :
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print_dollarhex (cd, info, fields->f_xmode, 0, pc, length);
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break;
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default :
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/* xgettext:c-format */
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fprintf (stderr, _("Unrecognized field %d while printing insn.\n"),
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||
opindex);
|
||
abort ();
|
||
}
|
||
}
|
||
|
||
cgen_print_fn * const mt_cgen_print_handlers[] =
|
||
{
|
||
print_insn_normal,
|
||
};
|
||
|
||
|
||
void
|
||
mt_cgen_init_dis (CGEN_CPU_DESC cd)
|
||
{
|
||
mt_cgen_init_opcode_table (cd);
|
||
mt_cgen_init_ibld_table (cd);
|
||
cd->print_handlers = & mt_cgen_print_handlers[0];
|
||
cd->print_operand = mt_cgen_print_operand;
|
||
}
|
||
|
||
|
||
/* Default print handler. */
|
||
|
||
static void
|
||
print_normal (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void *dis_info,
|
||
long value,
|
||
unsigned int attrs,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = (disassemble_info *) dis_info;
|
||
|
||
#ifdef CGEN_PRINT_NORMAL
|
||
CGEN_PRINT_NORMAL (cd, info, value, attrs, pc, length);
|
||
#endif
|
||
|
||
/* Print the operand as directed by the attributes. */
|
||
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
|
||
; /* nothing to do */
|
||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
|
||
(*info->fprintf_func) (info->stream, "%ld", value);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "0x%lx", value);
|
||
}
|
||
|
||
/* Default address handler. */
|
||
|
||
static void
|
||
print_address (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void *dis_info,
|
||
bfd_vma value,
|
||
unsigned int attrs,
|
||
bfd_vma pc ATTRIBUTE_UNUSED,
|
||
int length ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = (disassemble_info *) dis_info;
|
||
|
||
#ifdef CGEN_PRINT_ADDRESS
|
||
CGEN_PRINT_ADDRESS (cd, info, value, attrs, pc, length);
|
||
#endif
|
||
|
||
/* Print the operand as directed by the attributes. */
|
||
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SEM_ONLY))
|
||
; /* Nothing to do. */
|
||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
|
||
(*info->print_address_func) (value, info);
|
||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
|
||
(*info->print_address_func) (value, info);
|
||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_SIGNED))
|
||
(*info->fprintf_func) (info->stream, "%ld", (long) value);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "0x%lx", (long) value);
|
||
}
|
||
|
||
/* Keyword print handler. */
|
||
|
||
static void
|
||
print_keyword (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
void *dis_info,
|
||
CGEN_KEYWORD *keyword_table,
|
||
long value,
|
||
unsigned int attrs ATTRIBUTE_UNUSED)
|
||
{
|
||
disassemble_info *info = (disassemble_info *) dis_info;
|
||
const CGEN_KEYWORD_ENTRY *ke;
|
||
|
||
ke = cgen_keyword_lookup_value (keyword_table, value);
|
||
if (ke != NULL)
|
||
(*info->fprintf_func) (info->stream, "%s", ke->name);
|
||
else
|
||
(*info->fprintf_func) (info->stream, "???");
|
||
}
|
||
|
||
/* Default insn printer.
|
||
|
||
DIS_INFO is defined as `void *' so the disassembler needn't know anything
|
||
about disassemble_info. */
|
||
|
||
static void
|
||
print_insn_normal (CGEN_CPU_DESC cd,
|
||
void *dis_info,
|
||
const CGEN_INSN *insn,
|
||
CGEN_FIELDS *fields,
|
||
bfd_vma pc,
|
||
int length)
|
||
{
|
||
const CGEN_SYNTAX *syntax = CGEN_INSN_SYNTAX (insn);
|
||
disassemble_info *info = (disassemble_info *) dis_info;
|
||
const CGEN_SYNTAX_CHAR_TYPE *syn;
|
||
|
||
CGEN_INIT_PRINT (cd);
|
||
|
||
for (syn = CGEN_SYNTAX_STRING (syntax); *syn; ++syn)
|
||
{
|
||
if (CGEN_SYNTAX_MNEMONIC_P (*syn))
|
||
{
|
||
(*info->fprintf_func) (info->stream, "%s", CGEN_INSN_MNEMONIC (insn));
|
||
continue;
|
||
}
|
||
if (CGEN_SYNTAX_CHAR_P (*syn))
|
||
{
|
||
(*info->fprintf_func) (info->stream, "%c", CGEN_SYNTAX_CHAR (*syn));
|
||
continue;
|
||
}
|
||
|
||
/* We have an operand. */
|
||
mt_cgen_print_operand (cd, CGEN_SYNTAX_FIELD (*syn), info,
|
||
fields, CGEN_INSN_ATTRS (insn), pc, length);
|
||
}
|
||
}
|
||
|
||
/* Subroutine of print_insn. Reads an insn into the given buffers and updates
|
||
the extract info.
|
||
Returns 0 if all is well, non-zero otherwise. */
|
||
|
||
static int
|
||
read_insn (CGEN_CPU_DESC cd ATTRIBUTE_UNUSED,
|
||
bfd_vma pc,
|
||
disassemble_info *info,
|
||
bfd_byte *buf,
|
||
int buflen,
|
||
CGEN_EXTRACT_INFO *ex_info,
|
||
unsigned long *insn_value)
|
||
{
|
||
int status = (*info->read_memory_func) (pc, buf, buflen, info);
|
||
|
||
if (status != 0)
|
||
{
|
||
(*info->memory_error_func) (status, pc, info);
|
||
return -1;
|
||
}
|
||
|
||
ex_info->dis_info = info;
|
||
ex_info->valid = (1 << buflen) - 1;
|
||
ex_info->insn_bytes = buf;
|
||
|
||
*insn_value = bfd_get_bits (buf, buflen * 8, info->endian == BFD_ENDIAN_BIG);
|
||
return 0;
|
||
}
|
||
|
||
/* Utility to print an insn.
|
||
BUF is the base part of the insn, target byte order, BUFLEN bytes long.
|
||
The result is the size of the insn in bytes or zero for an unknown insn
|
||
or -1 if an error occurs fetching data (memory_error_func will have
|
||
been called). */
|
||
|
||
static int
|
||
print_insn (CGEN_CPU_DESC cd,
|
||
bfd_vma pc,
|
||
disassemble_info *info,
|
||
bfd_byte *buf,
|
||
unsigned int buflen)
|
||
{
|
||
CGEN_INSN_INT insn_value;
|
||
const CGEN_INSN_LIST *insn_list;
|
||
CGEN_EXTRACT_INFO ex_info;
|
||
int basesize;
|
||
|
||
/* Extract base part of instruction, just in case CGEN_DIS_* uses it. */
|
||
basesize = cd->base_insn_bitsize < buflen * 8 ?
|
||
cd->base_insn_bitsize : buflen * 8;
|
||
insn_value = cgen_get_insn_value (cd, buf, basesize);
|
||
|
||
|
||
/* Fill in ex_info fields like read_insn would. Don't actually call
|
||
read_insn, since the incoming buffer is already read (and possibly
|
||
modified a la m32r). */
|
||
ex_info.valid = (1 << buflen) - 1;
|
||
ex_info.dis_info = info;
|
||
ex_info.insn_bytes = buf;
|
||
|
||
/* The instructions are stored in hash lists.
|
||
Pick the first one and keep trying until we find the right one. */
|
||
|
||
insn_list = CGEN_DIS_LOOKUP_INSN (cd, (char *) buf, insn_value);
|
||
while (insn_list != NULL)
|
||
{
|
||
const CGEN_INSN *insn = insn_list->insn;
|
||
CGEN_FIELDS fields;
|
||
int length;
|
||
unsigned long insn_value_cropped;
|
||
|
||
#ifdef CGEN_VALIDATE_INSN_SUPPORTED
|
||
/* Not needed as insn shouldn't be in hash lists if not supported. */
|
||
/* Supported by this cpu? */
|
||
if (! mt_cgen_insn_supported (cd, insn))
|
||
{
|
||
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
|
||
continue;
|
||
}
|
||
#endif
|
||
|
||
/* Basic bit mask must be correct. */
|
||
/* ??? May wish to allow target to defer this check until the extract
|
||
handler. */
|
||
|
||
/* Base size may exceed this instruction's size. Extract the
|
||
relevant part from the buffer. */
|
||
if ((unsigned) (CGEN_INSN_BITSIZE (insn) / 8) < buflen &&
|
||
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
|
||
insn_value_cropped = bfd_get_bits (buf, CGEN_INSN_BITSIZE (insn),
|
||
info->endian == BFD_ENDIAN_BIG);
|
||
else
|
||
insn_value_cropped = insn_value;
|
||
|
||
if ((insn_value_cropped & CGEN_INSN_BASE_MASK (insn))
|
||
== CGEN_INSN_BASE_VALUE (insn))
|
||
{
|
||
/* Printing is handled in two passes. The first pass parses the
|
||
machine insn and extracts the fields. The second pass prints
|
||
them. */
|
||
|
||
/* Make sure the entire insn is loaded into insn_value, if it
|
||
can fit. */
|
||
if (((unsigned) CGEN_INSN_BITSIZE (insn) > cd->base_insn_bitsize) &&
|
||
(unsigned) (CGEN_INSN_BITSIZE (insn) / 8) <= sizeof (unsigned long))
|
||
{
|
||
unsigned long full_insn_value;
|
||
int rc = read_insn (cd, pc, info, buf,
|
||
CGEN_INSN_BITSIZE (insn) / 8,
|
||
& ex_info, & full_insn_value);
|
||
if (rc != 0)
|
||
return rc;
|
||
length = CGEN_EXTRACT_FN (cd, insn)
|
||
(cd, insn, &ex_info, full_insn_value, &fields, pc);
|
||
}
|
||
else
|
||
length = CGEN_EXTRACT_FN (cd, insn)
|
||
(cd, insn, &ex_info, insn_value_cropped, &fields, pc);
|
||
|
||
/* Length < 0 -> error. */
|
||
if (length < 0)
|
||
return length;
|
||
if (length > 0)
|
||
{
|
||
CGEN_PRINT_FN (cd, insn) (cd, info, insn, &fields, pc, length);
|
||
/* Length is in bits, result is in bytes. */
|
||
return length / 8;
|
||
}
|
||
}
|
||
|
||
insn_list = CGEN_DIS_NEXT_INSN (insn_list);
|
||
}
|
||
|
||
return 0;
|
||
}
|
||
|
||
/* Default value for CGEN_PRINT_INSN.
|
||
The result is the size of the insn in bytes or zero for an unknown insn
|
||
or -1 if an error occured fetching bytes. */
|
||
|
||
#ifndef CGEN_PRINT_INSN
|
||
#define CGEN_PRINT_INSN default_print_insn
|
||
#endif
|
||
|
||
static int
|
||
default_print_insn (CGEN_CPU_DESC cd, bfd_vma pc, disassemble_info *info)
|
||
{
|
||
bfd_byte buf[CGEN_MAX_INSN_SIZE];
|
||
int buflen;
|
||
int status;
|
||
|
||
/* Attempt to read the base part of the insn. */
|
||
buflen = cd->base_insn_bitsize / 8;
|
||
status = (*info->read_memory_func) (pc, buf, buflen, info);
|
||
|
||
/* Try again with the minimum part, if min < base. */
|
||
if (status != 0 && (cd->min_insn_bitsize < cd->base_insn_bitsize))
|
||
{
|
||
buflen = cd->min_insn_bitsize / 8;
|
||
status = (*info->read_memory_func) (pc, buf, buflen, info);
|
||
}
|
||
|
||
if (status != 0)
|
||
{
|
||
(*info->memory_error_func) (status, pc, info);
|
||
return -1;
|
||
}
|
||
|
||
return print_insn (cd, pc, info, buf, buflen);
|
||
}
|
||
|
||
/* Main entry point.
|
||
Print one instruction from PC on INFO->STREAM.
|
||
Return the size of the instruction (in bytes). */
|
||
|
||
typedef struct cpu_desc_list
|
||
{
|
||
struct cpu_desc_list *next;
|
||
CGEN_BITSET *isa;
|
||
int mach;
|
||
int endian;
|
||
CGEN_CPU_DESC cd;
|
||
} cpu_desc_list;
|
||
|
||
int
|
||
print_insn_mt (bfd_vma pc, disassemble_info *info)
|
||
{
|
||
static cpu_desc_list *cd_list = 0;
|
||
cpu_desc_list *cl = 0;
|
||
static CGEN_CPU_DESC cd = 0;
|
||
static CGEN_BITSET *prev_isa;
|
||
static int prev_mach;
|
||
static int prev_endian;
|
||
int length;
|
||
CGEN_BITSET *isa;
|
||
int mach;
|
||
int endian = (info->endian == BFD_ENDIAN_BIG
|
||
? CGEN_ENDIAN_BIG
|
||
: CGEN_ENDIAN_LITTLE);
|
||
enum bfd_architecture arch;
|
||
|
||
/* ??? gdb will set mach but leave the architecture as "unknown" */
|
||
#ifndef CGEN_BFD_ARCH
|
||
#define CGEN_BFD_ARCH bfd_arch_mt
|
||
#endif
|
||
arch = info->arch;
|
||
if (arch == bfd_arch_unknown)
|
||
arch = CGEN_BFD_ARCH;
|
||
|
||
/* There's no standard way to compute the machine or isa number
|
||
so we leave it to the target. */
|
||
#ifdef CGEN_COMPUTE_MACH
|
||
mach = CGEN_COMPUTE_MACH (info);
|
||
#else
|
||
mach = info->mach;
|
||
#endif
|
||
|
||
#ifdef CGEN_COMPUTE_ISA
|
||
{
|
||
static CGEN_BITSET *permanent_isa;
|
||
|
||
if (!permanent_isa)
|
||
permanent_isa = cgen_bitset_create (MAX_ISAS);
|
||
isa = permanent_isa;
|
||
cgen_bitset_clear (isa);
|
||
cgen_bitset_add (isa, CGEN_COMPUTE_ISA (info));
|
||
}
|
||
#else
|
||
isa = info->insn_sets;
|
||
#endif
|
||
|
||
/* If we've switched cpu's, try to find a handle we've used before */
|
||
if (cd
|
||
&& (cgen_bitset_compare (isa, prev_isa) != 0
|
||
|| mach != prev_mach
|
||
|| endian != prev_endian))
|
||
{
|
||
cd = 0;
|
||
for (cl = cd_list; cl; cl = cl->next)
|
||
{
|
||
if (cgen_bitset_compare (cl->isa, isa) == 0 &&
|
||
cl->mach == mach &&
|
||
cl->endian == endian)
|
||
{
|
||
cd = cl->cd;
|
||
prev_isa = cd->isas;
|
||
break;
|
||
}
|
||
}
|
||
}
|
||
|
||
/* If we haven't initialized yet, initialize the opcode table. */
|
||
if (! cd)
|
||
{
|
||
const bfd_arch_info_type *arch_type = bfd_lookup_arch (arch, mach);
|
||
const char *mach_name;
|
||
|
||
if (!arch_type)
|
||
abort ();
|
||
mach_name = arch_type->printable_name;
|
||
|
||
prev_isa = cgen_bitset_copy (isa);
|
||
prev_mach = mach;
|
||
prev_endian = endian;
|
||
cd = mt_cgen_cpu_open (CGEN_CPU_OPEN_ISAS, prev_isa,
|
||
CGEN_CPU_OPEN_BFDMACH, mach_name,
|
||
CGEN_CPU_OPEN_ENDIAN, prev_endian,
|
||
CGEN_CPU_OPEN_END);
|
||
if (!cd)
|
||
abort ();
|
||
|
||
/* Save this away for future reference. */
|
||
cl = xmalloc (sizeof (struct cpu_desc_list));
|
||
cl->cd = cd;
|
||
cl->isa = prev_isa;
|
||
cl->mach = mach;
|
||
cl->endian = endian;
|
||
cl->next = cd_list;
|
||
cd_list = cl;
|
||
|
||
mt_cgen_init_dis (cd);
|
||
}
|
||
|
||
/* We try to have as much common code as possible.
|
||
But at this point some targets need to take over. */
|
||
/* ??? Some targets may need a hook elsewhere. Try to avoid this,
|
||
but if not possible try to move this hook elsewhere rather than
|
||
have two hooks. */
|
||
length = CGEN_PRINT_INSN (cd, pc, info);
|
||
if (length > 0)
|
||
return length;
|
||
if (length < 0)
|
||
return -1;
|
||
|
||
(*info->fprintf_func) (info->stream, UNKNOWN_INSN_MSG);
|
||
return cd->default_insn_bitsize / 8;
|
||
}
|