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106 lines
2.2 KiB
C
106 lines
2.2 KiB
C
/* This testcase is part of GDB, the GNU debugger.
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Copyright 2015-2018 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#include <arm_neon.h>
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static void
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load (void)
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{
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int buf[8];
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asm ("ld1 { v1.8b }, [%[buf]]\n"
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"ld1 { v2.8b, v3.8b }, [%[buf]]\n"
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"ld1 { v3.8b, v4.8b, v5.8b }, [%[buf]]\n"
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:
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: [buf] "r" (buf)
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: /* No clobbers */);
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}
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static void
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move (void)
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{
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float32x2_t b1_ = vdup_n_f32(123.0f);
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float32_t a1_ = 0;
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float64x1_t b2_ = vdup_n_f64(456.0f);
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float64_t a2_ = 0;
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asm ("ins %0.s[0], %w1\n"
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: "=w"(b1_)
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: "r"(a1_), "0"(b1_)
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: /* No clobbers */);
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asm ("ins %0.d[1], %x1\n"
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: "=w"(b2_)
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: "r"(a2_), "0"(b2_)
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: /* No clobbers */);
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}
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static void
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adv_simd_mod_imm (void)
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{
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float32x2_t a1 = {2.0, 4.0};
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asm ("bic %0.2s, #1\n"
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"bic %0.2s, #1, lsl #8\n"
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: "=w"(a1)
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: "0"(a1)
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: /* No clobbers */);
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}
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static void
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adv_simd_scalar_index (void)
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{
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float64x2_t b_ = {0.0, 0.0};
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float64_t a_ = 1.0;
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float64_t result;
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asm ("fmla %d0,%d1,%2.d[1]"
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: "=w"(result)
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: "w"(a_), "w"(b_)
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: /* No clobbers */);
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}
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static void
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adv_simd_smlal (void)
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{
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asm ("smlal v13.2d, v8.2s, v0.2s");
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}
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static void
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adv_simd_vect_shift (void)
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{
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asm ("fcvtzs s0, s0, #1");
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}
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/* Initialize arch-specific bits. */
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static void initialize (void)
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{
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/* AArch64 doesn't currently use this function. */
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}
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/* Functions testing instruction decodings. GDB will test all of these. */
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static testcase_ftype testcases[] =
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{
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load,
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move,
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adv_simd_mod_imm,
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adv_simd_scalar_index,
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adv_simd_smlal,
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adv_simd_vect_shift,
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};
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