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https://sourceware.org/git/binutils-gdb.git
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1368b914e9
Now that all port tests live under testsuite/sim/*/, and none live in testsuite/ directly, flatten the structure by moving all of the dirs under testsuite/sim/ to testsuite/ directly. We need to stop passing --tool to dejagnu so that it searches all dirs and not just ones that start with "sim". Since we have no other dirs in this tree, and no plans to add any, should be fine.
122 lines
3.6 KiB
C
122 lines
3.6 KiB
C
/* Testsuite helpers for OpenRISC.
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Copyright (C) 2017-2021 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program. If not, see <http://www.gnu.org/licenses/>. */
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#ifndef OR1K_ASM_TEST_HELPERS_H
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#define OR1K_ASM_TEST_HELPERS_H
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#include "spr-defs.h"
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#include "or1k-asm-test-env.h"
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/* During exception handling the instruction under test is
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overwritten with a nop. Here we check if that is the case and
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report. */
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.macro REPORT_EXCEPTION instruction_addr
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PUSH r2
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PUSH r3
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LOAD_IMMEDIATE r3, \instruction_addr
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l.lws r2, 0(r3)
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LOAD_IMMEDIATE r3, 0x15000000 /* l.nop */
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l.sfeq r2, r3
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OR1K_DELAYED_NOP (l.bnf 1f)
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REPORT_IMMEDIATE_TO_CONSOLE 0x00000001
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OR1K_DELAYED_NOP (l.j 2f)
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1:
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REPORT_IMMEDIATE_TO_CONSOLE 0x00000000
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2:
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POP r3
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POP r2
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.endm
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/* Test that will set and clear sr flags, run instruction report
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the result and whether or not there was an exception.
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Arguments:
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flags_to_set - sr flags to set
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flags_to_clear - sr flags to clear
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opcode - the instruction to execute
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op1 - first argument to the instruction
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op2 - second argument to the function
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Reports:
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report(0x00000001);\n op1
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report(0x00000002);\n op1
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report(0x00000003);\n result
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report(0x00000000);\n 1 if carry
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report(0x00000000);\n 1 if overflow
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report(0x00000000);\n 1 if exception
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\n */
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.macro TEST_INST_FF_I32_I32 flags_to_set, flags_to_clear, opcode, op1, op2
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LOAD_IMMEDIATE r5, \op1
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LOAD_IMMEDIATE r6, \op2
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REPORT_REG_TO_CONSOLE r5
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REPORT_REG_TO_CONSOLE r6
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/* Clear the last exception address. */
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MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
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SET_SPR_SR_FLAGS \flags_to_set , r2, r3
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CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
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\@1$: \opcode r4, r5, r6
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MOVE_FROM_SPR r2, SPR_SR /* Save the flags. */
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REPORT_REG_TO_CONSOLE r4
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REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
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REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
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REPORT_EXCEPTION \@1$
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PRINT_NEWLINE_TO_CONSOLE
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.endm
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.macro TEST_INST_FF_I32_I16 flags_to_set, flags_to_clear, opcode, op1, op2
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LOAD_IMMEDIATE r5, \op1
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REPORT_REG_TO_CONSOLE r5
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REPORT_IMMEDIATE_TO_CONSOLE \op2
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SET_SPR_SR_FLAGS \flags_to_set , r2, r3
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CLEAR_SPR_SR_FLAGS \flags_to_clear, r2, r3
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/* Clear the last exception address. */
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MOVE_TO_SPR SPR_EPCR_BASE, ZERO_R0
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\@1$: \opcode r4, r5, \op2
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MOVE_FROM_SPR r2, SPR_SR /* Save the flags. */
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REPORT_REG_TO_CONSOLE r4
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REPORT_BIT_TO_CONSOLE r2, SPR_SR_CY
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REPORT_BIT_TO_CONSOLE r2, SPR_SR_OV
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REPORT_EXCEPTION \@1$
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PRINT_NEWLINE_TO_CONSOLE
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.endm
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.macro TEST_INST_I32_I32 opcode, op1, op2
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TEST_INST_FF_I32_I32 0, 0, \opcode, \op1, \op2
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.endm
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.macro TEST_INST_I32_I16 opcode, op1, op2
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TEST_INST_FF_I32_I16 0, 0, \opcode, \op1, \op2
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.endm
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.macro CHECK_CARRY_AND_OVERFLOW_NOT_SET overwritten_reg1, overwritten_reg2
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MOVE_FROM_SPR \overwritten_reg1, SPR_SR
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LOAD_IMMEDIATE \overwritten_reg2, SPR_SR_CY + SPR_SR_OV
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l.and \overwritten_reg1, \overwritten_reg1, \overwritten_reg2
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l.sfne \overwritten_reg1, ZERO_R0
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OR1K_DELAYED_NOP (l.bnf \@2$)
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EXIT_SIMULATION_WITH_IMMEDIATE_EXIT_CODE SEC_GENERIC_ERROR
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\@2$:
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.endm
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#endif /* OR1K_ASM_TEST_HELPERS_H */
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