mirror of
https://sourceware.org/git/binutils-gdb.git
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fdd12ef3c6
* ppc-dis.c (print_insn_powerpc): Don't print tabs. Handle PPC_OPERANDS_GPR_0. * ppc-opc.c (RA0): Define. (RAQ, RAL, RAM, RAS, RSQ, RTQ, RSO): Use PPC_OPERAND_GPR_0. (RAOPT): Rename from RAO. Update all uses. (powerpc_opcodes): Use RA0 as appropriate. Add "lsdx", "lsdi", "stsdx", "stsdi", "lmd" and "stmd" insns. include/opcode/ * ppc.h (PPC_OPERAND_GPR_0): Define. Bump other operand defines. gas/testsuite/ Update gas/ppc/. ld/testsuite/ Update ld-powerpc/.
77 lines
2.3 KiB
Makefile
77 lines
2.3 KiB
Makefile
#source: tls.s
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#as: -a64
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#ld: -melf64ppc tmpdir/libtlslib.so
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#objdump: -dr
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#target: powerpc64*-*-*
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.*: +file format elf64-powerpc
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Disassembly of section \.text:
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.* <_start-0x1c>:
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.* 3d 82 00 00 addis r12,r2,0
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.* f8 41 00 28 std r2,40\(r1\)
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.* e9 6c 80 48 ld r11,-32696\(r12\)
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.* e8 4c 80 50 ld r2,-32688\(r12\)
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.* 7d 69 03 a6 mtctr r11
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.* e9 6c 80 58 ld r11,-32680\(r12\)
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.* 4e 80 04 20 bctr
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.* <_start>:
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.* e8 62 80 10 ld r3,-32752\(r2\)
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.* 60 00 00 00 nop
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.* 7c 63 6a 14 add r3,r3,r13
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.* 38 62 80 18 addi r3,r2,-32744
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.* 4b ff ff d5 bl .*
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.* e8 41 00 28 ld r2,40\(r1\)
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.* 3c 6d 00 00 addis r3,r13,0
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.* 60 00 00 00 nop
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.* 38 63 90 38 addi r3,r3,-28616
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.* 3c 6d 00 00 addis r3,r13,0
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.* 60 00 00 00 nop
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.* 38 63 10 00 addi r3,r3,4096
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.* 39 23 80 40 addi r9,r3,-32704
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.* 3d 23 00 00 addis r9,r3,0
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.* 81 49 80 48 lwz r10,-32696\(r9\)
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.* e9 22 80 28 ld r9,-32728\(r2\)
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.* 7d 49 18 2a ldx r10,r9,r3
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.* 3d 2d 00 00 addis r9,r13,0
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.* a1 49 90 58 lhz r10,-28584\(r9\)
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.* 89 4d 90 60 lbz r10,-28576\(r13\)
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.* 3d 2d 00 00 addis r9,r13,0
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.* 99 49 90 68 stb r10,-28568\(r9\)
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.* 3c 6d 00 00 addis r3,r13,0
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.* 60 00 00 00 nop
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.* 38 63 90 00 addi r3,r3,-28672
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.* 3c 6d 00 00 addis r3,r13,0
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.* 60 00 00 00 nop
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.* 38 63 10 00 addi r3,r3,4096
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.* f9 43 80 08 std r10,-32760\(r3\)
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.* 3d 23 00 00 addis r9,r3,0
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.* 91 49 80 10 stw r10,-32752\(r9\)
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.* e9 22 80 08 ld r9,-32760\(r2\)
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.* 7d 49 19 2a stdx r10,r9,r3
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.* 3d 2d 00 00 addis r9,r13,0
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.* b1 49 90 58 sth r10,-28584\(r9\)
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.* e9 4d 90 2a lwa r10,-28632\(r13\)
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.* 3d 2d 00 00 addis r9,r13,0
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.* a9 49 90 30 lha r10,-28624\(r9\)
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.* 7d 89 02 a6 mfctr r12
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.* 78 0b 1f 24 rldicr r11,r0,3,60
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.* 34 40 80 00 addic\. r2,r0,-32768
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.* 7d 8b 60 50 subf r12,r11,r12
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.* 7c 42 fe 76 sradi r2,r2,63
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.* 78 0b 17 64 rldicr r11,r0,2,61
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.* 7c 42 58 38 and r2,r2,r11
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.* 7d 8b 60 50 subf r12,r11,r12
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.* 7d 8c 12 14 add r12,r12,r2
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.* 3d 8c 00 01 addis r12,r12,1
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.* e9 6c 01 c4 ld r11,452\(r12\)
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.* 39 8c 01 c4 addi r12,r12,452
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.* e8 4c 00 08 ld r2,8\(r12\)
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.* 7d 69 03 a6 mtctr r11
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.* e9 6c 00 10 ld r11,16\(r12\)
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.* 4e 80 04 20 bctr
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.* 38 00 00 00 li r0,0
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.* 4b ff ff bc b .*
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