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6afcd2d416
binutils-gdb/gdb/arch
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Luis Machado 6afcd2d416 [AArch64] SVE/FPSIMD fixup for big endian 
The FPSIMD dump in signal frames and ptrace FPSIMD dump in the SVE context
structure follows the target endianness, whereas the SVE dumps are
endianness-independent (LE).

Therefore, when the system is in BE mode, we need to reverse the bytes
for the FPSIMD data.

Given the V registers are larger than 64-bit, I've added a way for value
bytes to be set, as opposed to passing a 64-bit fixed quantity. This fits
nicely with the unwinding *_got_bytes function and makes the trad-frame
more flexible and capable of saving larger registers.

The memory for the bytes is allocated via the frame obstack, so it gets freed
after we're done inspecting the frame.

gdb/ChangeLog:

2020-12-10  Luis Machado  <luis.machado@linaro.org>

	* aarch64-linux-tdep.c (aarch64_linux_restore_vreg) New function.
	(aarch64_linux_sigframe_init): Call aarch64_linux_restore_vreg.
	* aarch64-tdep.h (V_REGISTER_SIZE): Move to ...
	* arch/aarch64.h: ... here.
	* nat/aarch64-sve-linux-ptrace.c: Include endian.h.
	(aarch64_maybe_swab128): New function.
	(aarch64_sve_regs_copy_to_reg_buf)
	(aarch64_sve_regs_copy_from_reg_buf): Adjust FPSIMD entries.
	* trad-frame.c (trad_frame_reset_saved_regs): Initialize
	the data field.
	(TF_REG_VALUE_BYTES): New enum value.
	(trad_frame_value_bytes_p): New function.
	(trad_frame_set_value_bytes): New function.
	(trad_frame_set_reg_value_bytes): New function.
	(trad_frame_get_prev_register): Handle register values saved as bytes.
	* trad-frame.h (trad_frame_set_reg_value_bytes): New prototype.
	(struct trad_frame_saved_reg) <data>: New field.
	(trad_frame_set_value_bytes): New prototype.
	(trad_frame_value_bytes_p): New prototype.
2020-12-10 11:45:08 -03:00
..
aarch32.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
aarch32.h
aarch64-insn.c Fix shifting of negative value 2020-12-04 11:17:00 -03:00
aarch64-insn.h Fix shifting of negative value 2020-12-04 11:17:00 -03:00
aarch64.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
aarch64.h [AArch64] SVE/FPSIMD fixup for big endian 2020-12-10 11:45:08 -03:00
amd64.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
amd64.h
arc.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
arc.h gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
arm-get-next-pcs.c gdb, gdbserver, gdbsupport: fix leading space vs tabs issues 2020-11-02 10:28:45 -05:00
arm-get-next-pcs.h
arm-linux.c
arm-linux.h
arm.c gdb, gdbserver, gdbsupport: fix leading space vs tabs issues 2020-11-02 10:28:45 -05:00
arm.h
i386.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
i386.h
ppc-linux-common.c
ppc-linux-common.h
ppc-linux-tdesc.h
riscv.c gdb/riscv: rewrite target description validation, add rv32e support 2020-12-02 18:30:42 +00:00
riscv.h gdb/riscv: rewrite target description validation, add rv32e support 2020-12-02 18:30:42 +00:00
tic6x.c gdb: Delay releasing target_desc_up in more cases 2020-10-09 11:45:44 +01:00
tic6x.h
xtensa.h