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https://sourceware.org/git/binutils-gdb.git
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a2c5833233
The result of running etc/update-copyright.py --this-year, fixing all the files whose mode is changed by the script, plus a build with --enable-maintainer-mode --enable-cgen-maint=yes, then checking out */po/*.pot which we don't update frequently. The copy of cgen was with commit d1dd5fcc38ead reverted as that commit breaks building of bfp opcodes files.
61 lines
1.9 KiB
C
61 lines
1.9 KiB
C
/* coff information for Zilog Z800N
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Copyright (C) 2001-2022 Free Software Foundation, Inc.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 3 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
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MA 02110-1301, USA. */
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#define L_LNNO_SIZE 4
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#include "coff/external.h"
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/* Type of cpu is stored in flags */
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#define F_Z8001 0x1000
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#define F_Z8002 0x2000
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#define F_MACHMASK 0xf000
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#define Z8KMAGIC 0x8000
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#define Z8KBADMAG(x) (((x).f_magic != Z8KMAGIC))
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/********************** RELOCATION DIRECTIVES **********************/
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/* The external reloc has an offset field, because some of the reloc
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types on the z8k don't have room in the instruction for the entire
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offset - eg with segments. */
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struct external_reloc
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{
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char r_vaddr[4];
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char r_symndx[4];
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char r_offset[4];
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char r_type[2];
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char r_stuff[2];
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};
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#define RELOC struct external_reloc
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#define RELSZ 16
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/* Z8k relocations. */
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#define R_IMM16 0x01 /* 16 bit abs */
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#define R_JR 0x02 /* jr 8 bit disp */
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#define R_IMM32 0x11 /* 32 bit abs */
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#define R_IMM8 0x22 /* 8 bit abs */
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#define R_IMM4L 0x23 /* low nibble */
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#define R_REL16 0x04 /* 16 bit PC rel */
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#define R_CALLR 0x05 /* callr 12 bit disp */
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#define R_SEG 0x10 /* set if in segmented mode */
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#define R_IMM4H 0x24 /* high nibble */
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#define R_DISP7 0x25 /* djnz displacement */
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