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According to the description of the state machine, the expectation appears to be that (leaving aside labels) any insn mnemonic or directive would be followed by a comma separated list of operands. That may have been true very long ago, but the latest with the advent of more elaborate macros this isn't rhe case anymore. Neither macro parameters in macro definitions nor macro arguments in macro invocations are required to be separated by commas. Hence whitespace serves a crucial role there. Plus even without "real" macros issues exist, in e.g. .irp n, ... insn\n\(suffix) operand1, operand2 .endr Whitespace following the closing parenthesis would have been removed (ahead of even processing the .irp), as the "opcode" was deemed to have ended earlier already. Therefore, squash the distinction between "opcode" and operands, i.e. fold state 10 back into state 3. Also drop most of the distinction between "symbol chars" and "relatively normal" ones. Not entirely unexpectedly this results in the need to skip whitespace in a few more places in arch-specific code (and quite likely more changes are needed for insn forms not covered by the testsuite). As a result the D10V special case is no longer necessary. In config/tc-sparc.c also move a comment to be next to the code being commented. In opcodes/cgen-asm.in some further cleanup is done, following the local var adjustments. |
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