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6a2619f953
With this change all gas and most ld tests pass when configured for arm-linux. It doesn't look like these configurations have been tested in a long time but this attempts to stem the bit-rot slightly. gas/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * gas/arm/bl-local-2.d: Only enable the test on EABI and NaCl configurations. * gas/arm/bl-local-v4t.d: Likewise. * gas/arm/blx-local.d: Likewise. * gas/arm/branch-reloc.d: Likewise. ld/testsuite/ChangeLog: 2014-07-10 Will Newton <will.newton@linaro.org> * ld-arm/arm-elf.exp (armelftests_nonacl): Move Cortex-A8 fix tests, IFUNC tests and other EABI requiring tests to... (armeabitests_nonacl): ...here. * ld-arm/arm-app-abs32.d: Loosen regex for architecture type to allow test to pass on configurations without an attributes section. * ld-arm/arm-app.d: Likewise. * ld-arm/arm-lib-plt32.d: Likewise. * ld-arm/arm-lib.d: Likewise. * ld-arm/arm-static-app.d: Likewise. * ld-arm/armthumb-lib.d: Likewise. * ld-arm/cortex-a8-far.d: Likewise. * ld-arm/farcall-mixed-app.d: Likewise. * ld-arm/farcall-mixed-lib-v4t.d: Likewise. * ld-arm/farcall-mixed-lib.d: Likewise. * ld-arm/mixed-app-v5.d: Likewise. * ld-arm/mixed-app.d: Likewise. * ld-arm/mixed-lib.d: Likewise. * ld-arm/tls-app.d: Likewise. * ld-arm/tls-descrelax-be32.d: Likewise. * ld-arm/tls-descrelax.d: Likewise. * ld-arm/tls-descseq.d: Likewise. * ld-arm/tls-gdesc-got.d: Likewise. * ld-arm/tls-gdesc.d: Likewise. * ld-arm/tls-gdierelax.d: Likewise. * ld-arm/tls-gdierelax2.d: Likewise. * ld-arm/tls-gdlerelax.d: Likewise. * ld-arm/tls-lib-loc.d: Likewise. * ld-arm/tls-lib.d: Likewise. * ld-arm/tls-thumb1.d: Likewise.
128 lines
3.9 KiB
Makefile
128 lines
3.9 KiB
Makefile
tmpdir/farcall-mixed-lib.so: file format elf32-(little|big)arm
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architecture: arm.*, flags 0x00000150:
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HAS_SYMS, DYNAMIC, D_PAGED
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start address 0x.*
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Disassembly of section .plt:
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.* <app_func@plt-0x14>:
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.*: e52de004 push {lr} ; \(str lr, \[sp, #-4\]!\)
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.*: e59fe004 ldr lr, \[pc, #4\] ; .* <app_func@plt-0x4>
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.*: e08fe00e add lr, pc, lr
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.*: e5bef008 ldr pc, \[lr, #8\]!
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.*: .* .word .*
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.* <app_func@plt>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]! ; .*
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.* <app_func_weak@plt>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.*
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.* <lib_func3@plt>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.*
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.* <lib_func4@plt>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e28fc6.* add ip, pc, #.*
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.*: e28cca.* add ip, ip, #.* ; 0x.*
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.*: e5bcf.* ldr pc, \[ip, #.*\]! ; 0x.*
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Disassembly of section .text:
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.* <lib_func1>:
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.*: e1a0c00d mov ip, sp
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.*: e92dd800 push {fp, ip, lr, pc}
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.*: ebffff.. bl .* <app_func@plt\+0x.*>
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.*: ebffff.. bl .* <app_func_weak@plt\+0x.*>
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.*: ebffff.. bl .* <lib_func3@plt\+0x.*>
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.*: ebffff.. bl .* <lib_func4@plt\+0x.*>
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.*: e89d6800 ldm sp, {fp, sp, lr}
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.*: e12fff1e bx lr
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...
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.* <__real_lib_func2>:
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.*: f000 f80e bl 1000330 <__app_func_from_thumb>
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.*: f000 f81c bl 1000350 <__app_func_weak_from_thumb>
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.*: f000 f822 bl 1000360 <__lib_func3_from_thumb>
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.*: f000 f810 bl 1000340 <__lib_func4_from_thumb>
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.* <__app_func_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 100033c <__app_func_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: feffff68 .word 0xfeffff68
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.* <__lib_func4_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 100034c <__lib_func4_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: feffff88 .word 0xfeffff88
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.* <__app_func_weak_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 100035c <__app_func_weak_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: feffff58 .word 0xfeffff58
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.* <__lib_func3_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 100036c <__lib_func3_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: feffff58 .word 0xfeffff58
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...
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.* <__real_lib_func3>:
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.*: f000 f80e bl 2000390 <__app_func_from_thumb>
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.*: f000 f804 bl 2000380 <__app_func_weak_from_thumb>
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.*: 4770 bx lr
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: 46c0 nop ; \(mov r8, r8\)
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.* <__app_func_weak_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 200038c <__app_func_weak_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: fdffff28 .word 0xfdffff28
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.* <__app_func_from_thumb>:
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.*: 4778 bx pc
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.*: 46c0 nop ; \(mov r8, r8\)
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.*: e59fc000 ldr ip, \[pc\] ; 200039c <__app_func_from_thumb\+0xc>
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.*: e08cf00f add pc, ip, pc
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.*: fdffff08 .word 0xfdffff08
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.* <lib_func3>:
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.*: e59fc004 ldr ip, \[pc, #4\] ; 20003ac <lib_func3\+0xc>
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.*: e08cc00f add ip, ip, pc
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.*: e12fff1c bx ip
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.*: ffffffc5 .word 0xffffffc5
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.* <lib_func2>:
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.*: e59fc004 ldr ip, \[pc, #4\] ; 20003bc <lib_func2\+0xc>
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.*: e08cc00f add ip, ip, pc
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.*: e12fff1c bx ip
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.*: feffff55 .word 0xfeffff55
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